Expanding EDA

Newer Tools Let You Do More than Just Electronics

by Bryon Moyer

Welcome to autumn. It’s usually a busy season – although the activity typically starts more with the onset of September and the resumption of school than with the equinox. But it also comes on the heels of a quiet season, even in the overworked US.

And EDA has seemed moderately quiet. So I started looking around to see what I might have been missing, and I’m not sure there’s a lot. But it did get me musing on why things might be quiet for the moment as well as what fills the gap – which gets to the topic of what qualifies as EDA. It’s more than you might think.

At the risk of being obviously over-simple, the legions of coders in EDA-land are doing one of two things: building new technologies or improving on old ones. The new technology category might include support for FinFETs or multi-patterning or the design kits for the latest silicon node. The improvement side of the tree is where performance and capacity and usability are juiced up – all in the name of productivity, of course.  Read More


latest news

October 16, 2014

Cadence Announces Industry’s First Multi-Protocol DDR4 and LPDDR4 IP Solution

October 15, 2014

Coverity Releases Security Spotlight Report on Critical Security Defects in Open Source Projects

Keithley Introduces IVy, the First Smart Device App for Source Measure Unit (SMU) Instruments

October 14, 2014

Synopsys Enables Superior Verification Planning and Coverage Analysis with Verdi Coverage

New DesignWare ARC HS38 Processor Doubles Performance for Embedded Linux Applications

October 13, 2014

PRO DESIGN Releases Embedded Processing Platform for FPGA based SoC and IP Prototyping

October 09, 2014

Keysight Technologies Introduces World’s Highest Bandwidth, Lowest Noise Probe for Oscilloscope Power Integrity Measurements

October 08, 2014

HiSilicon Chooses Synopsys' PrimeTime ADV for Faster Timing Closure

Altium announces Altium Designer 15 to ease high speed PCB design woes

October 07, 2014

Synopsys Releases Verification IP for Mobile PCIe Technology

October 03, 2014

ARM Achieves 50X Faster OS Boot-Up on Mali GPU Development using Cadence Palladium XP Platform with ARM Fast Models

Keithley Provides Full, Wafer-Level Support Including High Voltage Capacitance-Voltage Testing for Its Parametric Curve Tracer Configurations

October 02, 2014

Cadence to Showcase Advanced Verification Solutions at DVCon Europe 2014

October 01, 2014

Synopsys' Galaxy Design Platform Delivers Over 30% Leakage Power Reduction for Fujitsu Semiconductor's ARM-Powered Multi-Core

Altium broadens ARM Cortex-M device support to its TASKING C compiler for ARM

EDA News Archive

Shifting Left

Designing Code, Breaking Code, and the Verification in Between

by Amelia Dalton

Go-Fast FPGA Design

Helpful Hot-Rodding Hints

by Kevin Morris

Going Vertical

Ecosystem for Interposer-based Design?

by Kevin Morris

On The Hunt: Part One

HLS and Sub-atomic Particle Jitter

by Amelia Dalton

Optimization Moves Up a Level

Mentor’s RealTime Designer Rises to RTL

by Bryon Moyer

EDA Article Archive

 

Editors' Blog

Faster Extraction from Cadence

posted by Bryon Moyer

Cadence has upgraded their parasitic extraction tools for the 16-nm node. (28-Aug)

Planning PCB, Package, and Die Together

posted by Bryon Moyer

Cadence’s OrbitIO tries to tie together disparate tools and inefficient ways of planning pinouts. (31-Jul)

Intelligent VIP

posted by Bryon Moyer

Arrow Devices focuses on building semantics into their VIP for a higher level of abstraction. (23-Jul)

Improved FPGA Tool Results

posted by Bryon Moyer

Plunify tries to get the best out of FPGA design tools (21-Jul)

Synopsys’s IP Initiative

posted by Bryon Moyer

Synopsys is taking a holistic view of SoC design using IP, including hardware and software elements. (17-Jun)

EDA Editors' Blog Archive

forum

Glass sculptures that look like knitted yarn

Posted on 10/17/14 at 6:03 PM by SteveNordquis4

SteveNordquis4
Spherical semiconductor retirees will tend to bring a dish or interconnect and SoC idea when invited to dinner.

The invisible umbrella

Posted on 10/16/14 at 6:30 PM by SteveNordquis4

SteveNordquis4
Hygroscopic motor technology! Model used to walk around with a 2-edged air knife, so that's her usual personal space give or take the pressure reservoir.

Typhoon microweather is in! No energy needed after the first 70kW to put the 'umbrella' up. Patent…

New Chips are HIPP

Posted on 10/16/14 at 10:46 AM by kevin

kevin
I thought about variations like HICP and HIPCP, but it seemed like they'd be pronounced too much like "hiccup," and having a hiccup in your design would be a bad thing.

EDA Forum Archive

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On Demand

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Routing Interfaces Quickly & Efficiently on PCBs

Overcome the Challenges of Highly Constrained Designs

EDA On Demand Archive


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