Neutrons are coming for you and you’d better be prepared. Whether we like it or not, SEUs (Single Event Upsets) are becoming a bigger and bigger problem for our designs, especially for high realibility systems. If you thought SEUs couldn’t mess up your next design because you aren’t designing something destined for space, you need … Read More → "High-Reliability in FPGA Design – SEU Mitigation"
In this episode of Chalk TalkHD Amelia chats with Tori Darien from Xilinx about using Tcl in Xilinx’s PlanAhead tool for FPGA design. Amelia throws Tori some examples, and Tori walks us through how to work them using PlanAhead’s Tcl interface. Click The Button Below to Fill Out A Short Survey and Enter to Win an LX9 … Read More → "The Power of Tcl in PlanAhead"
In this episode of Chalk TalkHD Amelia chats with Frederic Rivoallon of Xilinx and they attempt to unravel the mysteries of FPGA timing closure. As we all know, timing closure on complex FPGA designs can sometimes seem like an endless cycle of iterations through the tool chain. However, using the tools and techniques from this Chalk … Read More → "Timing Closure in FPGA Designs Made Easy with PlanAhead"
No engineer enjoys re-inventing the wheel. We want to focus our talent on the part of our design that’s new and cool. One way we can go straight past that whole “re-inventing the wheel” part of our designs is to take advantage of three key engineering-time-saving technologies: pre-made small form factor boards, high-performance embedded processors and programmable logic … Read More → "Maximize Design Productivity With PCIe/104 FPGA/Processor"
No matter how cool your design project is, you inevitably have to deal with the system and power management aspects before your cool project can actually work. Most folks do that with a bunch of ad-hoc components and a lot of annoying, late-in-the-project overtime work. In this episode of Chalk TalkHD Amelia chats with … Read More → "Integrated Power and System Management"
Convergence in today’s electronics is a double-edged sword. On one hand, the fact that devices like smart phones have replaced a bunch of other gadgets is a fantastic development in areas like consumer electronics. On the other hand, getting all of those power-hungry applications to work together without consuming too much power can be a tough … Read More → "IP and Process Solutions for Energy-efficient PMICs"
Not everyone wants to tackle a 2 million logic element FPGA design all by themselves. But where do you start? How do you break down the design steps into logical pieces for a team of people to work on? In this episode of Chalk TalkHD, Amelia chats with David Dye of Xilinx about how Hierarchical Design methodologies … Read More → "Hierarchical Design Flows: Design Preservation & Team Design"
Video design is easy, right? A silicon press, a couple of coders and some lines of software, and you’re there, right? Well, not so fast. If your design requires intelligent processing of the video, keeping your performance high and your power low in your next video design can be a truly challenging task, but using … Read More → "Spartan-6 FPGAs in Video Designs"
In this episode of our new Chalk TalkHD series, Amelia Dalton talks to Todd Nelson from Linear Technology about how digital predistortion (DPD) can be used to save millions of dollars worth of power in base station designs. DPD is simple to apply, and has a dramatic impact on the power amplifier – the most power-hungry … Read More → "Digital Predistortion for Base Station Power Amplifiers"
Oct 19, 2018
Any engineer who has designed an IC-based solution likely used some sort of HW development tool. Semiconductor manufacturers have a long history of providing engineers with the HW tools needed to test their silicon. Evaluation platforms, like the Xilinx® Zynq UltraScale+ ...
Oct 19, 2018
CC BY-SA 3.0 Lukealderton When people typically think of multi-board PCB design, they tend to picture racks of boards in server farms or the components of a gaming rig. But what if your typical rigid boards don't fit within the physical envelope of your multi-board applic...
Oct 16, 2018
IC Insights has just published the September Update to The 2018 McClean Report, and one figure (reproduced below) puts yet another nail into the coffin for poor old Moore's Law. Now please take care. There's a vertical line between the 200mm wafers on the left ...
Oct 12, 2018
At the end of the day, your products are only as good as their in-the-field performance. It doesn't matter how well they performed in a controlled environment....