chalk talk
Subscribe to EE Journal Daily Newsletter

Stratus™ High-Level Synthesis

High-Level Synthesis (HLS) has been gaining traction in the mainstream for the past couple of years. But, HLS is good for a lot more than just increasing development productivity. In this episode of Chalk Talk, Amelia Dalton chats with David Pursley of Cadence Designs Systems about the new Stratus High-Level Synthesis technology, and how it will impact design productivity as well as the deployment and distribution of IP. 

Click here to download a free whitepaper, datasheet and case study all about Stratus High-Level Synthesis.

Leave a Reply

featured blogs
Oct 18, 2017
In this week's Whiteboard Wednesdays, the second in a three-part series, Scott Jacobson discuses the drivers that are changing the requirements for automotive memory models. (Please visit the site to view this video)...
Oct 17, 2017
Everyone loves a good book. From Shakespearean classics to more modern-day masterpieces, a solid story can leave a lasting impression. While the VITA family of standards isn’t necessarily a book, it does have a rich history with a large impact.  As we learned in a prev...
Sep 12, 2017
Torrents of packets will cascade into the data center: endless streams of data from the Internet of Things (IoT), massive flows of cellular network traffic into virtualized network functions, bursts of input to Web applications. And hidden in the cascades, far darker bits try...
Sep 29, 2017
Our existing customers ask us some pretty big questions: “How can this technology implement a step-change in my specific process? How can Speedcore IP be integrated in my SoC? How can you increase the performance of my ASIC?” We revel in answering such questions. Ho...