Apr 08, 2014

Metal Oxide Photoresists Lower Roughness

posted by Bryon Moyer

One of the huge challenges of advanced-node patterning is roughness. There are actually two flavors of this: line-edge roughness (LER) and line-width roughness (LWR). Almost the same, but not quite.

The first is visible by looking at one edge of a line, and it’s hard to use any other word besides “rough” to describe what this means. It’s not long meanders in the line (which you might not expect from a mask, but might get with something like directed self-assembly (DSA); it’s the really small granular stuff. If you were to extract the frequency content of the edge, you’d be looking for the high-frequency mode, not the low end.

LWR is similar, but takes into account both sides of a line. Each edge has its own roughness, but, if by some effect, the two sides managed to track exactly, each jogging right or left when the other did, then the width of the line would be exactly constant. So even though the edges might be rough, in this idealized case, there would be no LWR (and no changes in impedance, although the constant impedance would be impacted by scattering at the rough edges).

In practice, the left side might jog left while the right side jogs right, creating a wide spot (lower impedance) in the line. Or vice versa, pinching the line down (higher impedance). This gives roughness to the line. You can think of LER as common mode and LWR as differential mode if you want. Yes, there’s a mathematical definition; we don’t need it for our purposes here.

So, obviously, the thinner your lines become, the more that roughness – if it remains constant – becomes a problem, because the deviations from perfection become an increasing percentage of the line width. And I used the word “granular” above on purpose, since it is the granularity of the resist that contributes to the roughness.

Standard resists are polymers – chains of monomers of some substance. The smallest unit available here is the monomer itself – break that and you end up with a different chemical substance. And, according to Inpria, a startup offering new resists, these monomers are in the range of 4 to 6 nm in length. That’s a non-trivial percentage of the feature size at a 10-nm node (even though we shouldn’t take that 10 too literally).

In order to smooth out the resist, a smaller grain is needed. And this is what Inpria is proposing to bring to the table: metal oxide-based resists. They’re delivered in an organic medium, but that organic nature gasses away, leaving only something that resembles a ceramic more than a plastic. And the grain size is on the order of 1 nm. Inpria claims the smallest, smoothest sub-10-nm lines yet.

Its hardness is another benefit. Many times “hard masks” are created by filming the wafer with a “hard” material and then patterning that with resist. These metallic oxide resists are hard enough to act as their own hard masks, eliminating those extra steps.

Challenges remain. Dose sensitivity is still being optimized, although it’s apparently better than conventional resists, which Inpria says require a high dose. Anything reducing the needed dose goes directly to improving exposure throughput, which we know is the biggest remaining EUV hurdle. (At this point, I have no information as to whether the double-exposure trick reported earlier applies here… no reason to think it would, since the chemistry is different.)

More challenging, perhaps, is reducing defectivity. This is where much of Inpria’s activity is focused now.

I suppose it’s too early to declare victory – new materials and new vendors of something so fundamental will be viewed cautiously by fab managers. You can imagine metals and their oxides that might play havoc if set loose in a cleanroom, so there’s something of a convincing job. But hafnium and tin are top of the list at this point, with good performance and good fab compatibility.

We’ll be able to watch progress even as EUV results are demonstrated. You may notice in the numbers that companies like ASML present, in some cases they’ll show results both for conventional and for Inpria resists. If you’ve ever wondered what that means, well, now you know.

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Apr 03, 2014

A Jump in EUV Resist Sensitivity?

posted by Bryon Moyer

There was an interesting presentation that happened towards the end of SPIE Litho – it seemed to catch the audience off guard, and I frankly went away with the sense that there was some confusion in the room.

The presentation discussed an experiment that was done at Osaka University as part of the overall effort to optimize EUV exposure. It all relates to this seemingly inviolate triumvirate of “RLS”: resolution, LWR (line-width roughness), and sensitivity. Improvements within these three have to come at the expense of something within these three – they form a zero-sum game.

Normally, you expose the photoresist through the mask for the entire length of the exposure. The photons create acid where they interact with the resist, and this acid provides for the selective removal of resist material during development.

This experiment changed that. The exposure was broken into two steps:

  • A short exposure through the mask
  • After 10-15 minutes, then, with no mask, just a flood of UV across the entire wafer.

The first exposure seemed to create some acid, but mostly “sensitized” the photoresist (and I frankly didn’t come away understanding what that “sensitizing” meant from a chemical standpoint). The strange thing then was that flooding with the second exposure created the normal amount of acid only in the sensitized area.

This provided about 9 times the prior sensitivity, with no apparent tradeoff in LWR or resolution.

Note that no special resists were used; these were the same resists as are currently being used.

I didn’t get the sense that they had a real handle on what the underlying mechanisms were, and it was surprising to the audience. Assuming the data are correct, it’s certainly an interesting result. We’ll have to see if anything further comes of it, or if it goes the way of cold fusion…

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Apr 02, 2014

More MEMS Microphone Options

posted by Bryon Moyer

Everything’s going HD these days, and audio is no exception. That means that everything in the audio chain, from microphone to speaker, has to step up its game.

Akustica announced their first HD microphone in late 2012; they recently announced some new additions to the family.

And once again, packaging demonstrates that it refuses to be taken for granted with microphones. This is illustrated in two different aspects of the new Akustica offerings.

First is the notion of where the port goes. Port location makes a difference in the acoustics, but it also impacts designers that want more flexibility in locating and mounting the mics on very small boards like those inside phones. This is even truer given that multiple mics are becoming the rule for noise cancellation and other reasons.

So sometimes a designer wants to use a top-ported mic; sometimes a bottom-ported one. The thing is, apparently the audio software strongly prefers that the microphones be identical (or close to it). Changing the porting can screw that up, either resulting in tougher software or less placement flexibility for the designer.

So Akustica has announced matched top- and bottom-ported microphones. The idea is that you can use either one and they’ll still be close to “identical” (±1%). They accomplish the matching with a combination of tight manufacturing tolerances and a calibration step at test. Both the MEMS element itself and the accompanying ASIC are optimized.

The second package impact – and die strategy – has to do with the package size. With most every IC or sensor, smaller is always better (ignoring price). Not so with microphones. Given more space, you can do a two-die solution, optimizing MEMS and ASIC separately. You also have more cavity room in the package, which is important for sound quality.

So, while they’ve announced their matched high-performance HD mics, they also announced what they say is the smallest microphone around, in a 2x3 mm2 package. It is said to have good performance, but does compromise somewhat from the larger devices to achieve the smaller size.

You can read more about these in their announcement.

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