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C2000™ MCU Motor Control Primer

There is a significant demand for well-equipped digital motor control (DMC) platforms to educate the next generation of engineers.  In this users guide, a number of introductory-level digital motor control methodologies and laboratory tools are presented. These tools help engineers learn how to easily construct their own systems using TI provided device drivers, APIs, utilities, and libraries. Also learn about TI’s motor control developer’s kits, software framework, and DMC library. These documents provide a modular development strategy which allows the user to experiment incrementally from a basic … Read More → "C2000™ MCU Motor Control Primer"

Implementing the Top Five Control-Path Applications with Low-Cost, Low-Power CPLDs

Since their introduction in the mid-1980s and across all end markets, CPLDs have been design engineers’ favorite choice for control path applications. Taking into account today’s severe pressure to lower costs and power consumption, this white paper examines how Altera® MAX® V CPLDs provide solutions for the top five control-path applications.

Author:  Thomas Schulte, Senior Product Marketing Manager, Low-Cost Products, … Read More → "Implementing the Top Five Control-Path Applications with Low-Cost, Low-Power CPLDs"

Implementing PCI Express Bridging Solutions in an FPGA

Like its predecessor, the Peripheral Component Interconnect (PCI), PCI Express is becoming a ubiquitous system interface. Unlike PCI, PCI Express adopts a Serializer/Deserializer (SERDES) interface to provide users with the scalability required for future applications. As system bandwidths increase, more applications are moving to SERDES-based interfaces like PCI Express. In the past, ASICs or ASSPs typically have been used to implement next generation interface solutions. ASICs and ASSPs were popular choices because they provided a low cost, low power design solution. However, several new FPGAs families now … Read More → "Implementing PCI Express Bridging Solutions in an FPGA"

Reducing Cost and Power in Consumer Applications Using PLDs

The need to respond to changing market standards in a compressed time to market window has led to the widespread use of programmable logic devices (PLDs) in a broad range of consumer applications. While development of application specific integrated circuits (ASICs) and application specific standard parts (ASSPs) requires high non-recurring engineering charges, PLDs are standard off-the-shelf parts that can be customized for different applications using flexible software tools. Unlike ASICs and ASSPs, PLDs do not require long lead times: their functionality can be changed at any time to … Read More → "Reducing Cost and Power in Consumer Applications Using PLDs"

MachXO2 Overview

The MachXO2 family offers designers of low density PLDs an unprecedented mix of low cost, low power and high system integration in a single device. Compared to its popular predecessor, the MachXO family, the MachXO2 family delivers a 3X increase in logic density, 10X increase in memory, over 100X reduction in static power, and up to 30% lower cost. In addition, the MachXO2 devices include hardened implementations of some of the most popular functions such as User Flash Memory (UFM), I2C, SPI and timer/counter, providing designers a “ … Read More → "MachXO2 Overview"

Accelerate Your System and Consumer Designs With MachXO2 PLDs

The MachXO2 family offers designers of low-density PLDs an unprecedented mix of low cost, low power and high system integration in a single device. Built on a low power 65-nm process featuring embedded Flash technology, the MachXO2 family delivers a 3X increase in logic density, a 10X increase in embedded memory, more than a 100X reduction in static power and up to 30% lower cost compared to the prior generation MachXO family.  In addition, several popular functions used in low-density PLD  applications, such as user Flash memory ( … Read More → "Accelerate Your System and Consumer Designs With MachXO2 PLDs"

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