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Changing Waves

For over four decades, progress in processing power has ridden the crest of a massive breaker called Moore’s Law. We needed only to position our processing boards along the line of travel at the right time, and our software was continuously accelerated with almost no additional intervention from us. In fact, from a performance perspective, software technology itself has often gone backward – squandering seemingly abundant processing resources in exchange for faster development times and higher levels of programming abstraction.

Today, however, Moore’s Law may be finally washing up. Even though physics may … Read More → "Changing Waves"

Assemble All Ye IP

There are two levels of DSP design. First, there’s the conceptual level, where hard-core algorithm development rules the day. Your big concern here is the numerical correctness of your algorithm, but there’s no timing information or data typing to fret about. This is the comfort zone for the traditional DSP designer. You’re dealing with a problem from a purely mathematical point of view, using a procedural language like “M” in the MathWorks’ MATLAB, which is suited for un-timed algorithms with mathematically friendly data types to fine-tune your formula.

Read More → "Assemble All Ye IP"

The Case for Hardware/Software Co-Verification

Large devices allow you to stuff a whole system into the FPGA, but debugging these complex systems with limited visibility – and a one-day turnaround for synthesis plus place and route – can consume weeks of your precious time.

Hardware/software co-verification has been successfully applied to complex ASIC designs for years. Now available to FPGA designers, this technology brings together the debug productivity of both a logic simulator and a software debugger. Co-verification enables you to remove synthesis and place and route from the design iteration loop, while yielding performance gains 1,000 times faster than logic simulation.Read More → "The Case for Hardware/Software Co-Verification"

Chillin’ with QuickLogic

Deep in the system designer’s psyche, the traditional truths of FPGA are fused with non-volatile, metal-to-metal connections. FPGAs are expensive. FPGAs consume too much power. FPGAs and battery-powered consumer devices are complete non-starters.

QuickLogic should guard their secret carefully – the one about their new PolarPro being an FPGA family. When designers of portable media players are looking for a device that can significantly increase the battery life of their next-generation units, FPGAs will likely be the last place they think to look. After all, FPGAs burn power like toasters. FPGAs are expensive. Nobody in his … Read More → "Chillin’ with QuickLogic"

The Case for Hardware/Software Co-Verification

Because development boards are readily available, many FPGA designers make the mistake of relying on them as their primary embedded processor debug and verification environment. Can you get the job done that way? Well, yes you can, but then you can also dig a trench with a teaspoon – if you have enough time.

Large devices allow you to stuff a whole system into the FPGA, but debugging these complex systems with limited visibility – and a one-day turnaround for synthesis plus place and route – can consume weeks of your precious time.

Hardware/software … Read More → "The Case for Hardware/Software Co-Verification"

Chillin’ with QuickLogic

Soft sourceless music flows through the dim-lit scene. The faint smell of incense lingers. The embedded system designer sitting back on the recliner is a relaxed subject, miles from the high-stress world of project schedules and power budgets. The white-robed researcher speaks softly through the microphone, pausing just long enough for the subject’s responses to her word-associations to be heard. “Fire”… “hot”, “Pillow”… “soft”, “Schedule”… “late”, “Water”… “clear”, “Budget”… “over”, “FPGA& … Read More → "Chillin’ with QuickLogic"

Tyranny of the Metaphor

It seems reasonable enough on the surface. There is a pile of work to be done, and one of the project manager’s duties is to analyze that pile into something more manageable – usually a schedule with a resource plan and budget. The well-meaning project manager looks to the wisdom of conventional project planning for guidance in calming the chaos. After all, project management is not a new science. For decades, (if not millennia), techniques for taming the complexity of large collaborative projects such as construction have been well understood. If we just pretend our embedded software … Read More → "Tyranny of the Metaphor"

Thinking Like Xilinx

Conventional wisdom says that Charles Dickens’s novels are so long because he was paid by the word. This is not strictly true, as his novels were published in serial form, and Dickens was paid by the installment. The net result is the same, however, as the volume of reading required to mine the gold from his classic works is legendary. Plot lines that could reasonably be summarized in a few succinct paragraphs drag on through chapter after chapter of flowery, flowing, profitable prose.

It appears sometimes that the PR professionals in FPGA and … Read More → "Thinking Like Xilinx"

featured blogs
Sep 24, 2018
One of the biggest events in the FPGA/SoC ecosystem is the annual Xilinx Developers Forum (XDF). XDF connects software developers and system designers to the deep expertise of Xilinx engineers, partners, and industry leaders. XDF takes place in three locations this year.  Sa...
Sep 24, 2018
For the second year, the Electronic Design Process Symposium (EDPS) took place in Milpitas, having been at Monterey for many years. This was apparently the 25th year EDPS has run. I find EDPS to be a fascinating conference, and I think it is a shame that more people don'...
Sep 21, 2018
  FPGA luminary David Laws has just published a well-researched blog on the Computer History Museum'€™s Web site titled '€œWho invented the Microprocessor?'€ If you'€™re wildly waving your raised hand right now, going '€œOoo, Ooo, Ooo, Call on me!'€ to get ...
Sep 20, 2018
Last week, NVIDIA announced the release of the Jetson Xavier developer kit. The Jetson Xavier, which was developed in OrCAD, is designed to help developers prototype with robots, drones, and other......