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Actel Adds Analog

Myopia is one of the few unfortunate consequences of specialization. While focus, refinement, and evolution deliver us some of our most impressive efficiencies, indiscriminate rule breaking is more often the root of spectacular progress. We walk along in our well-walled worlds day-to-day, carefully categorizing concepts like “Field Programmable Gate Array,” “Structured and Platform ASIC,” and “Programmable System on Chip,” and we forget to color outside the lines occasionally, just to see what happens.

Actel announced its new Fusion architecture this week, and somebody clearly went a little crazy with the coloring … Read More → "Actel Adds Analog"

A New Spin on FPGA Re-spins

Back when FPGAs were simpler devices, in-system debug was sufficient. Turning a re-spin in response to a specification violation found on the bench was a quick and easy process. Life was great, since re-spins were essentially “free”. This is no longer the case today. One company recently spent three entire months trying to incorporate just one late-coming specification change, because the design team encountered difficulties meeting requirements after making that single change. This is not an isolated case; increasingly painful re-spins are no longer a rare occurrence. Clearly, this particular re-spin cost the customer dearly. … Read More → "A New Spin on FPGA Re-spins"

SRC Code

“It was the best of times, it was the worst of times,
it was the age of hardware design, it was the age of programming,
it was the epoch of synthesis, it was the epoch of compilation,
it was the season of optimization, it was the season of acceleration,
it was the spring of flexibility, it was the winter of automation,
we had everything before us, we had nothing before us,
we were all going direct to Hardware, we were all going direct
the other way–in short, the period … Read More → "SRC Code"

LSI Logic’s Leverage

What has over two million real ASIC gates, runs at over 200MHz with twenty levels of logic, burns about the power of a cell-based ASIC, and is economically feasible to deploy even in mid-to-small volume production? The answer is “Not an FPGA”. While these specs may sound close to the marketing picture painted by programmable logic vendors, there is a vast gulf between the brochure and real-world performance in an average application. Structured and platform ASICs, however, can realistically reach these goals in your average application, and getting design teams to understand that fact is one of … Read More → "LSI Logic’s Leverage"

Ditchin’ DAC

From before my kids were born until after they were grown and graduated, it was a June ritual. Twenty-one times in all, I made my annual pilgrimage to the Design Automation Conference (DAC), perhaps the most misunderstood massing of technology professionals our industry has to offer. DAC is “Burning Man” for the left brain – a mysteriously gravitational gathering that inexplicably pulls people from around the globe to one central location in non-consensual celebration of the unclear.

This year, the 42nd annual DAC was held in Anaheim California. It featured 240 exhibitors, 60 of whom were showing … Read More → "Ditchin’ DAC"

What the Hell is ESL?

The tool category known as “Kitchen Appliances” covers a wide gamut of capabilities. Kitchen appliances range from general-purpose, universally useful tools such as heat sources, to highly specialized, perhaps less-than-indispensable technologies like “in-the-egg scramblers”. If someone tells you that his or her tool is a kitchen appliance, you haven’t really gained any useful information about its utility for your particular application.

The design tool category known as “ESL” has similar characteristics. When someone tries to sell you an ESL tool, it’s never quite clear what you’ … Read More → "What the Hell is ESL?"

FPGAs Enabling Consumer Electronics – A Growing Trend

It was in the late 1990s that FPGA vendors first started exploring the low-cost, high-volume consumer market – a market that generally was ceded to standard, fixed-function devices. Exploring this market was made possible by the development of FPGAs with the right balance of features and the migration to advanced process nodes which helped to drastically reduce FPGA unit costs.

Historically for high-volume, price-sensitive applications, FPGAs were not the lowest-cost solution. However, as custom logic and FPGAs started to get pad-limited vs. core-limited, this started to change. Pad limitation occurs when the size … Read More → "FPGAs Enabling Consumer Electronics – A Growing Trend"

Are These Guys Dense, or What?

Context can drastically impact the meaning of a simple word. If you’re walking down the street minding your own business, you might find yourself feeling more than a little bit offended if someone calls you dense. You may even experience a brief but painful flashback to that dreaded walk through the gauntlet of cool kids lining the halls in school, hearing any number of rude, if inaccurate, comments (after all, who’s calling who dense?) thrown with casual abandon in your direction. Now, change the circumstance. You’re at a tradeshow, … Read More → "Are These Guys Dense, or What?"

Accelerating C Software Applications Using a CompactFlash FPGA Accelerator Card

As the cost per gate of FPGAs continues to plummet, developers of embedded software applications are being presented with increased opportunities to create high performance, hardware-accelerated systems. These systems—which represent applications in domains ranging from image processing and DSP to larger-scale applications for scientific computing—benefit from the massive levels of parallelism that are available when FPGAs are used as alternatives to traditional processor architectures.

This article describes how the convergence of easier-to-use, more powerful FPGA-based computing platforms and software-to-hardware design tools can make the design of accelerated FPGA-based algorithms easier and more practical … Read More → "Accelerating C Software Applications Using a CompactFlash FPGA Accelerator Card"

Shrink-wrapping EDA

When I bought my first 10MB hard-disk drive, the salesman came to visit and even took me out to lunch. I was a freshman in engineering school and I was buying the $10,000 unit for my employer, a hotel chain, to use for storing reservation data. At the time, a purchase of that amount of mass storage was a major transaction, both for our little company and for our supplier. The disk drive, about the size of a modern desktop computer, was delivered and installed by a trained technician who spent an hour with us going over the operating procedures … Read More → "Shrink-wrapping EDA"

featured blogs
Mar 23, 2018
Up to this point, my blogs have been focused on the fluid flow aspects of  CFD simulation, but since thermal effects can have a significant impact on flow as the fluid properties are affected by the temperature change, I will now start to look at some of the heat transfer as...
Mar 23, 2018
It was SEMICON China last week, and I've written a couple of posts about it this week. Talking about semiconductor manufacturing equipment a lot recently reminded me of a friend who used to work in the semiconductor equipment industry (and I did some consulting for him y...
Mar 22, 2018
Samtec’s RF product and service offering continues to grow.  Here’s a quick overview of the major developments: Expanded Bulls Eye® Offering:  Bulls Eye high-performance test point systems are now available in 50 GHz and 20 GHz designs, with systems up to 65 GH...
Mar 5, 2018
Next-generation networking solutions are pushing processing out of the cloud and towards the network'€™s edge. At the same time, processing structures architected around programmable logic provide the ability to make computing much more data-centric. Programmable logic make...