“You don’t understand,” my father patiently explained. “People have enormous collections of vinyl records. They’re never going to switch to a new format like compact disc, even if the sound and convenience are better. There’s just too much already invested.” Generally, Dad was a progressive, technically-savvy, keep-up-with-change kinda’ guy. On some issues, however, he just couldn’t see past the status-quo. His experience had built a level of technology-rooted myopia that his vision couldn’t overcome. When the new thing came along, even though … Read More → "Status Quopia"
Development using Ring 3 provides the benefit of memory protection from the application, which aids in debugging the application by letting the hardware catch common programming errors. This enables rapid development, because in many cases, only the application will crash upon hitting a bug. With the operating system running, the application can be restarted and the debugging can be continued – resulting in a quick test, debug and fix cycle.
However, this does not hold true during deployment. A real-time system, by its very nature, requires the application and the operating system to be fully functioning and stable. … Read More → "Getting Performance with Memory Protection in Real-time Windows Systems"
We’ve all had our moments. If you hear that your blind date has a great sense of humor, perhaps you develop a preconceived notion about said date’s outward appearance. What if you were told that your date was an engineer?
The stereotype that brands engineers as nerds is clearly defined. It’s reached a level of stability and adoption that could qualify it for ratification by the IEEE. It could be known as the “Nerd Classification Code,” or NCC-1701. Over the years, creative jokesters have found ever more amusing ways … Read More → "This Engineer Walks Into a Bar…"
Just out of college and needing some extra cash during the holidays, I worked briefly for a high-end haberdashery in Virginia. During orientation, we learned the tricks of the trade, including how to tie the perfect tie (I can still perform this impressive parlor trick…) and how to fold and stack dress shirts. But tucked neatly among all the expensive men’s clothing presentation skills was an actual life lesson. We were coached that we must not judge any customer by his appearance, and that some of the most important clients to visit the store would look … Read More → "This Engineer Walks Into a Bar…"
Unless you’ve been hiding in some dark cubicle night and day for the past year (which, admittedly, is easier for this audience than for most), you’ve heard about WiMAX, a.k.a. IEEE 802.16, and the promise that it brings for both the fixed and mobile sides of the broadband wireless market. Learning more about it is a bit like swimming backward through acronym soup with a side of evolving standards, but such is life with a ground-breaking global standard.
WiMAX, which stands for worldwide interoperability for microwave access, is an evolutionary step in … Read More → "Beverly Hills 802.16"
You know what they say about technophiles: Give us a wireless inch and we’ll take a wireless mile. Actually, make that a wireless metropolitan area network. It seems like only yesterday that we were content, even ecstatic, with a wireless network in our homes. Then we said, “Hey, if only we could use our wireless technology while drinking coffee in a small cafe, our lives would be complete.” Once we got a taste of non-fat, grande, double-shot Internet espresso, we wanted to put our coffee in a to-go cup, move our laptop applications … Read More → "Beverly Hills 802.16"
For years, we’ve talked about how FPGAs have the potential to accelerate digital signal processing (DSP) algorithms, producing higher performance with lower cost and lower power consumption than traditional DSP processors*. Whoa! Did you see that – the asterisk at the end of that claim? It’s true, though. Using the parallel computing capability of a typical DSP-enabled FPGA (one with hardware multipliers, MACs, or DSP accelerators) you can get tens to hundreds of times the throughput of a DSP processor running the same algorithm in compiled C code*. Hey! There it was again!
Innovations within one domain of electronic product design typically have an unforeseen impact on other areas. For instance, innovation within FPGA devices that has enabled increased functional complexity and I/O performance has introduced challenges downstream during PCB design. Increased functional complexity has resulted in increased I/O pins per device and increased package pin density. In addition, increased I/O performance has resulted in a tighter set of PCB interconnect constraints to minimize degradation of high-speed signals as they travel between devices. The ability to leverage FPGA I/O flexibility to optimize FPGA/PCB performance offers significant value, … Read More → "Design Challenges Flow Downstream"
Content and concept are an interesting combination. People read FPGA and Structured ASIC Journal each week to learn from its content – articles, announcements, analysis, advertisements, and alliteration — all of them working together to inform and entertain engineers interested in programmable logic and structured ASIC design. Interestingly, it turns out that there’s a lot we can learn about programmable logic from FPGA Journal’s concept, too. That’s because FPGA Journal is to technical publications what FPGAs are to system design – highly flexible, fast to market, field programmable, field upgradeable, and at … Read More → "Field Programmable Journalism"