At HARDI Electronics, we started working seriously with ASIC prototyping in FPGAs about five years ago, and we quickly realized what the challenges were. First, it was obvious that the prototyping system needed to have the required capacity corresponding to the gate size of the ASIC. In year 2000, that was quite a problem since maximum FPGA capacity was a couple of hundred thousand ASIC gates and the ASICs were 10-100 times larger (1-10 million gates). Since then, the FPGA gate capacity has grown significantly. Today the largest available FPGA, the Xilinx Virtex-4 LX200, has an equivalent ASIC gate capacity … Read More → "How to Make An ASIC Prototype"
It’s a lifelong dream for many people to actually fly a plane on their own. The daring, carefree, wind-in-your hair pilot personality, however, is a bit of a myth. In real life, a good pilot is more like a good engineer. You plan and check everything meticulously. You want to find and fix any potential problems before you leave the ground, because once the wheels are up, it’s too late. Imagine you’ve been taking flying lessons now for several months, and you’ve finally logged the training hours, completed all of your … Read More → "Top-Flight Prototypes"
What happened is that our cars have evolved to become, essentially, complex, networked, embedded systems – big ones. An average car when I was a kid back in the ’70s had just a small number of electronic components – lights (yes, we all had those, but it seemed like a head or tail light was always burning out), a slick and fancy 8-track “audio system,” and possibly air conditioning — not much else. Electronics in these vehicles accounted for just a sliver of the purchase price of the car, and didn’t cause much of a ruckus … Read More → "Connecting the Dots"
Open-source operating systems (and specifically embedded Linux) have been making big gains in the device software space. Development teams are attracted by the lack of licensing fees and contracts, lower cost of ownership, perceived portability, and broad availability of the underlying software and source code. Unfortunately, some of the mechanisms that create these attractive benefits also carry hidden (and not-so-hidden) penalties. Finding the right release (distribution), finding or creating a test suite that matches that distribution, getting support (since software that comes from nowhere has nobody answering the phones), and tracking the current and appropriate versions for your application … Read More → "The People’s RTOS"
When FPGAs flirted with the million-ASIC-gate density for the first time, a bell went off in many designers’ heads. This was not the tinny tintinnabulation of a bouncy little bicycle bell telling them, “Be alert, cyclist coming through.” No, this was the foul, foreboding clang of calamity to come. This was the thousand-ton tanker train of timing-closure nightmares turning around to bear down on them again from a new direction, threatening to bring back that all-too recent memory of indeterminate iteration in their ASIC design process to cause chaos in their new, happy, FPGA lives.< … Read More → "Synplifying Physical Synthesis"
First, there are many “knowns” in the enterprise software space. Developers usually develop on the same hardware (host machine) and software platform (i.e. operating system) that their final product will run on. Usually, it is a well-tested and well- known development environment that hasn’t changed over the multiple products that the developer has contributed to. As a result, the software developer typically focuses on the application rather than the environment. Additionally, in the majority of enterprise applications, there is also no concept of real-time performance, determinism, or interrupts (outside of keyboard, mouse and network). … Read More → "The Challenges of an Embedded Software Engineer"
As system designers, we encounter the integration question at a much lower level. Processors, peripherals, memory, interconnect, and storage are all basic components of almost every modern electronic system design. A successful system designer has to balance the forces of form factor, power, price, performance, reliability, security, scalability, and product evolution in order to make the crucial decision of what and how to integrate, and what to leave discrete. While there are myriad options available, there is no reliable formula or roadmap to guide us through this complex engineering tradeoff.
As system designers, the first thing we … Read More → "Intelligent Integration"
Last year, with little fanfare, we presented our first annual FPGA Journal Reader’s choice awards. The response was fantastic, and everybody wanted to know how they could participate in this year’s awards process… It doesn’t work that way, of course. We use a super-secret balloting system and carefully guard the data to prevent any unscrupulous parties from tampering with the results.
This year, over 350 design teams answered our call to rate their experience with FPGA and EDA companies’ products and services. Each customer was required to answer based on … Read More → "Second Annual FPGA Journal Awards"