MEMS is 20 years behind ICs.
So says MEMS consultant Alissa Fitzgerald of AMFitzgerald. A lot can happen in 20 years – and it could well be argued that MEMS doesn’t have 20 years to catch up. If it has a choice. And if it can even catch up completely.
The issue is the “one device, one process” component of Yole’s MEMS Law. This is something you would never see with ICs, especially in today’s fabless/foundry world. With ICs, the foundry has a process, it works a particular way, it has been thoroughly characterized twelve ways from Sunday, and those results have been incorporated into increasingly sophisticated models that EDA tools can use to predict with reasonable accuracy just what the results of a particular circuit will be.
And MEMS? It misses out on a number of those bullet points. First of all, for the most part, there is no such thing as a fixed process. The very essence of the MEMS Law is that you tweak the process to provide the desired sensor performance. In addition, while there are tools available from companies like Coventor, SoftMEMS, and Tanner to assist with MEMS design, Dr. Fitzgerald describes them more as “emulators” than “simulators,” since they can’t incorporate the fine process details into a final electrical result. So they’re useful, but they’re not at the same level that IC simulation tools are.
For example, she notes that sidewalls created by deep reactive ion etching (DRIE) are typically modeled as being vertical, when, in fact, they’re slightly angled. What might be intended as a rectangle (OK, a cube) is actually more like a trapezoid, and that difference has a measurable effect on something like a proof mass.
Today’s approach, then, is that designers use their best guesses as to how to configure a sensor, and then they build it and see how it works. Inevitably, it won’t be perfect, and so they go another round in classic “construct by correction” mode. And that’s just to get the sensor right – that’s not taking into account the co-design of the accompanying conditioning ASIC, which may itself have to be spun another round after the sensor is finally final.
The result? Well, consider that a sophisticated SoC with billions of transistors can be produced in around 18 months. A MEMS sensor with only a few moving parts (“only” being used advisedly) can take five years to see the light at the end of the tunnel. Five years isn’t egregious if you’re used to dealing with, say, the military/aerospace or even the automotive markets. They’re used to a ponderous, plodding pace. But there is a particular mismatch with the consumer-oriented market for items like phones and tablets, which are driving MEMS volumes and which last maybe six months before being replaced by a new and better version.
You could argue that the MEMS industry needs to achieve the kind of structure and modularity enjoyed in the IC industry, but that’s realistically not going to happen. Companies looking to differentiate their sensors are going to look to every advantage they can, whether it be the addition of new materials or a change in how those materials are processed. TSMC would never allow that for an IC customer, but it’s a degree of freedom needed for MEMS.
Which frankly raises the question, what does this mean, given that TSMC and other IC foundries are getting involved in MEMS? According to Silex, who bills itself as the largest pure-play MEMS foundry, the IC foundry guys are not typically developing their own proprietary ground-up technologies; they’re incorporating someone else’s completed process recipe – like Analog Devices’. So that raises the question as to whether they really plan to be MEMS-for-all-takers foundries or just cherry-pickers.
Silex’s particular solution to this problem stops short of standardizing the process itself, but it regularizes and modularizes the various process steps, making it easier to pull a process together without having to start from scratch. They call this their SmartBlocks approach.
To be clear, a block doesn’t indicate some functional element being added to a device; for instance, you wouldn’t have a cantilever as a block. Rather, it’s a collection of process steps. So at the lowest level, Silex has a library of process steps that it makes available to its customers. Those steps have been grouped together at a higher level to create the SmartBlocks process modules.
This means that a designer can work at a higher level using SmartBlocks, while still bringing in low-level process steps if needed. He or she can pull both from the SmartBlocks library and the process steps library; these blocks and steps can be arranged and rearranged to suit the new design – within limits.
The limits to the design process include mask layout rules; the allowed properties of various materials used, for example, as films; tolerances; and process step ordering restrictions. The latter is important in situations where, for example, a material is laid down that can’t tolerate high temperatures; that step can’t be followed by any high-temperature processing steps.
In the IC world, all of this data would be neatly bundled into process kit files; no such standardization exists here. The benefit of the SmartBlocks methodology is that one goes from what is essentially a “you can do anything” approach with no associated performance data to a “design within guidelines” approach that provides more predictable data to the designer.
To be clear, SmartBlocks isn’t a “product” that’s simply opened up to customers. Things still need enough manual attention that Silex works with each customer to craft the necessary process; SmartBlocks is what they use internally to make that process more predictable. As a result, you actually won’t see much about SmartBlocks on their website.
In the case of Silex’s recent announcement, they have partnered up with AMFitzgerald for actual sensor design, and Dr. Fitzgerald likens their newly-announced RocketMEMS process to that of a system designer specifying a transfer function to be designed by a circuit designer. The OEM in search of a sensor would specify all of the desired characteristics of the final sensor – performance, range, sensitivity, noise immunity, linearity, etc. – and AMFitzgerald would create the black box that meets those specs.
They would do so by leveraging the information and convenience of the SmartBlocks offering from Silex. They’ll be using that data to populate models for the simulation tools that they’ll use to validate their design prior to building. The expectation is that they can turn designs around much more quickly and accurately.
This takes a complex design flow, with lots of internal feedback loops, and makes it more unidirectional. The current approach is process-drives-design-drives-process-drives-design-drives… The goal here is to get to a simpler process-drives-design-period methodology. Which is how the IC industry works.
While AMFitzgerald and Silex will be working together in this mode, they ultimately see this as a way that the entire industry needs to work. Captive companies like ST and Freescale probably have such capabilities already in place in-house, but it’s not available to designers using foundries.
20 years is a lot of catching up to do. But rationalizing the MEMS design process could go a long way towards allowing a more nimble response to increasing demands from the rapidly growing range of systems wanting to use sensors, putting it much more in line with what IC designers can do today.