feature article
Subscribe Now

Who Cares?

Is Variation a Real Issue for Designers?

A couple years ago, the raging topic was DFM, with a heavy focus on litho issues. Curiously enough, part of the conversation consisted of the question, “Is there anything to this DFM stuff, or is it just a bunch of hype?”

The suggestion was that DFM was all about tools guys selling you stuff on the promise that it would help, with you having no real way to prove whether or not it was helping. (No one is going to go through a complete project twice, once with DFM tools and once without them as a control.) So the question was, do users really care about this?

These days, the buzz is all about variation. The fact that implants (no, not those kind of silicon implants, jeez…) varying by a few atoms may matter. The fact that a nice smooth layer of polysilicon looks more like Bryce Canyon than the Black Rock Desert. That the edge of a nice straight metal line looks more like the Northern California coast than a Southern California beach.

Foundries say it’s important. Tools guys say it’s important. They’ve been saying it’s important for a couple years now. Most people say it’s a problem. A few find it useful.

Question is, do users think it’s important?

Solido set out to ask that question. Now, if you know them or clicked the link and read our prior coverage or actually remember that article (what’s wrong with you??), you know that Solido deals in variation. So if you’re a discerning consumer, your BS filter should be at the ready. I’m not a consumer, but I do have something of a trigger-happy BS filter at the ready when I don my crusty curmudgeon persona.

So my first reaction was, variation company does study to figure out whether customers care about variation. Hmmmm… I wonder how that will turn out?

But I resisted the temptation to dismiss it entirely, and I asked a few questions. Such as, how did they administer the survey? Did the respondents know who was behind the survey? In particular, most of the questions deal with variation. So if someone could see the entire survey before answering any questions, there would be a severe variation bias on the first question that asks, what’s the most important issue? (Of which “variation” is only one of the possible answers.)

And here’s my understanding: this was a blind survey; the respondents did not know Solido was behind it. They would have answered the “what’s the most important issue?” question before seeing the follow-on ones. So my BS filter was getting kind of bored and asked if it could go and get some exercise by watching a Bachman speech about how the writers of the US Constitution eliminated slavery.

Here’s the deal: given a choice amongst custom IC design tools where the most advancement is needed, 66% of a group of 486 respondents picked Variation-Aware Design. That was more than any of the other candidates (which were, in order of the voting, Parasitic Extraction, Simulation, Physical Verification, Layout, Routing, Schematic Capture, and, of course, Other).

Here again the BS filter looked at the competition to make sure the deck wasn’t stacked in favor of “Variation-Aware Design” winning. But I didn’t see anything like, “Sharper Xacto knives so my Rubylith doesn’t tear” as a choice, so the filter went back to Youtube, where things were more entertaining.

Exactly what constitutes “variation-aware” design may, well, vary. But the gist of the problem is that you can’t simply guardband against variation. For analog designs, you may not even know where the real corners are. And Monte Carlo runs that cover enough ground to give you confidence that the design is solid are likely to take too long.

As an example, a variation-aware schematic editor would incorporate process variation information so that the impact can be dealt with early. Without that, you end up with a long design loop that, in the worst case, includes silicon, with measured corrections being fed back to the design and the process repeating. Hopefully not too many times. But, really, once is too many.

Here are some articulations of the real impact this has. 53% of engineers and managers said that they had missed deadlines or had silicon re-spins due to variation issues. The average project delay due to variation was 2 months, with 19% experiencing delays of 3 months or more. On average, design teams spent 22% of their time dealing with variation.

In particular, variation has a big impact on yield: things may work, but less often or on fewer wafers or circuits. If you’re designing a memory chip or an FPGA, you’re replicating a given sense amp or 6T cell or whatever millions of times. Any one of them going wrong kills the entire circuit. Of course, redundancy helps, but how much redundancy is needed? The more those circuits are dialed in to compensate for variation, the lower the failure rate, and the less redundancy you can get away with.

Variation also seems to get lumped in with another phenomenon: proximity effects. This isn’t a lithography thing that can be compensated. It’s the fact that nearby transistors or cells will influence each other. You can’t change that, but you need to know what the influence will be. That, by itself, isn’t a variation thing. But – guess what – proximity variation is an issue. So some of Solido’s tools, for example, also deal with proximity issues.

Of course, variation doesn’t show any preferences. Silicon will vary just as much for digital design as for analog. It’s just that digital cells, once crafted, can be assembled more easily, and you can tweak things like VCC to make adjustments if necessary. Not possible with analog, and analog has many more parameters that need to fall into a controlled range, so it really is the analog guy that gets stuck with this more.

So clearly there’s lots of work to be done. This survey identifies problems that need to be fixed, not problems that a company has magically fixed already and, voilà, just write a check and you’re golden. And it will be more than just Solido doing the work.

But, if the survey results are taken at face value, then at least those doing all that work can have some confidence that it actually matters to the folks that will use it.

More info: Solido survey

Leave a Reply

featured blogs
Aug 19, 2018
Consumer demand for advanced driver assistance and infotainment features are on the rise, opening up a new market for advanced Automotive systems. Automotive Ethernet allows to support more complex computing needs with the use of an Ethernet-based network for connections betw...
Aug 18, 2018
Once upon a time, the Santa Clara Valley was called the Valley of Heart'€™s Delight; the main industry was growing prunes; and there were orchards filled with apricot and cherry trees all over the place. Then in 1955, a future Nobel Prize winner named William Shockley moved...
Aug 17, 2018
Samtec’s growing portfolio of high-performance Silicon-to-Silicon'„¢ Applications Solutions answer the design challenges of routing 56 Gbps signals through a system. However, finding the ideal solution in a single-click probably is an obstacle. Samtec last updated the...
Aug 16, 2018
All of the little details were squared up when the check-plots came out for "final" review. Those same preliminary files were shared with the fab and assembly units and, of course, the vendors have c...
Jul 30, 2018
As discussed in part 1 of this blog post, each instance of an Achronix Speedcore eFPGA in your ASIC or SoC design must be configured after the system powers up because Speedcore eFPGAs employ nonvolatile SRAM technology to store its configuration bits. The time required to pr...