feature article

## Lyric Semiconductor Debuts “Probability Logic”

The old joke has finally come true: the AND, OR, and XOR gates are finally being joined by the “maybe gate.”

Boston-based startup Lyric Semiconductor has taken the wraps off its “probability logic,” a new kind of digital circuit based on Bayesian, rather than Boolean, arithmetic. Although the phrase might sound iffy and unpredictable, a sort of rehash of fuzzy logic, Lyric’s gates are actually completely reliable and deterministic. The difference is that they integrate the likelihood of an input as well as its state. The company says its new class of logic is useful for error correction, Web searches, genome sequencing, and more.

Compared to a standard Boolean exclusive-OR function, Lyric’s is both superficially the same and fundamentally different. It takes two inputs and produces one output. So far, so good. But the output isn’t simply a true/false condition based on the instantaneous state of the two input bits. Instead, Lyric’s XOR determines the probability that its two inputs are true or false. In electronic terms, probability is based on the number of electrons flowing through the inputs—the current, in other words.

In that sense, Lyric’s logic gates are analog, not digital, circuits. While that’s technically true, it’s also misleading. At some fundamental level, all digital circuits are analog. Lyric’s differ only quantitatively, not qualitatively. They make use of minor electrical differences that most digital circuits are designed to ignore. By leveraging this lost information, Lyric’s logic gates can make better-informed decisions. And that leads to smaller and more-efficient circuits.

Figure 1: A probabilistic exclusive-OR function. In Lyric Semiconductor’s new probability logic, the likelihood of two inputs (x and y) is weighed along with their values to produce output z.

The company’s business plan is to license its IP for now and then become a fabless chip company in a few years. Lyric’s initial offering is a “hard” IP macro for an error-correction circuit called LEC (for Lyric error correction). Compared to typical all-digital error-correction circuits, Lyric says its LEC is an amazing 30x smaller while also being 10x more power efficient. That’s a huge difference, and enough to make designers take notice. Error-correction circuits are widespread in networking applications, but they’re also commonly embedded in flash memory chips, where they compensate for natural variations and errors in fabrication. In short, Lyric is looking at a potentially high-volume market.

LEC is currently implemented only in TSMC’s 180nm process technology, so potential licensees are limited to that foundry and process node, at least for now. Since most flash vendors make their own parts and don’t use TSMC, that limits LEC’s appeal among those high-volume manufacturers. On the other hand, fabless chip companies that put flash into their 180nm chips might find Lyric’s circuit interesting.

In contrast to most IP vendors today, Lyric doesn’t offer LEC in a “soft,” or synthesizable, form. That’s because the Bayesian circuits require some experienced hand-tweaking during the layout and design phase. Lyric is happy to offer that service to interested licensees, but LEC is not simply another RTL block that can be synthesized into a larger device. With special capabilities come special requirements.

The Next Steps

Down the road, Lyric’s much more ambitious goal is to produce its own “probability processor,” a standalone CPU chip that directly executes Lyric’s own programming language, called DMPL. The language is Lyric’s own creation, designed specifically to complement its logic and processor designs. DMPL programmers can describe a program’s rules and constraints, rather than defining the exact process as procedure as with most programming languages. A program to solve Sudoku puzzles, for example, has only a dozen lines of source code, of which only about four are significant. Lyric’s probability processor would automatically iterate on all possible solutions within the outlined constraints, eventually (one hopes) arriving at one or more possible answers.

The technology is impressive, at least on paper, but the challenges will be daunting. There’s no shortage of good microprocessors on the market already, and an even greater supply of clever engineers designing more. The problem is not supply; it’s demand. The processor market is notoriously tough to crack, and the industry is littered with the hollowed-out corpses of technically brilliant microprocessor startups that failed to survive. Good technology, it turns out, is the least-reliable indicator of success. Winning the hearts and minds of potential programmers and engineers isn’t easy; they have little incentive to try something new, and even less patience with unproven suppliers.

Even so, there’s always room for breakthroughs, and perhaps Lyric’s plan to ease into the market with its error-correction circuitry will help pave the way. If the company can establish credibility (and build cash flow) though IP licensing, it may convince satisfied customers to take a look at its processor. Probably.

featured blogs
Aug 18, 2018
Once upon a time, the Santa Clara Valley was called the Valley of Heart's Delight; the main industry was growing prunes; and there were orchards filled with apricot and cherry trees all over the place. Then in 1955, a future Nobel Prize winner named William Shockley moved...
Aug 17, 2018
Samtec’s growing portfolio of high-performance Silicon-to-Silicon'¢ Applications Solutions answer the design challenges of routing 56 Gbps signals through a system. However, finding the ideal solution in a single-click probably is an obstacle. Samtec last updated the...
Aug 17, 2018
If you read my post Who Put the Silicon in Silicon Valley? then you know my conclusion: Let's go with Shockley. He invented the transistor, came here, hired a bunch of young PhDs, and sent them out (by accident, not design) to create the companies, that created the compa...
Aug 16, 2018
All of the little details were squared up when the check-plots came out for "final" review. Those same preliminary files were shared with the fab and assembly units and, of course, the vendors have c...
Jul 30, 2018
As discussed in part 1 of this blog post, each instance of an Achronix Speedcore eFPGA in your ASIC or SoC design must be configured after the system powers up because Speedcore eFPGAs employ nonvolatile SRAM technology to store its configuration bits. The time required to pr...