Xilinx and Altera have each recently and respectively announced agreements with ARM and MIPS. While these announcements may be coincidental, they trigger a decade-old feeling of digital-design deja vu. A mere ten years ago, with great fanfare, Altera introduced the ill-fated Excalibur – the Titanic of FPGA families – and ushered in the era of programmable systems-on-chip with FPGAs. Like the Apple Lisa and Newton, the product itself failed, but the concept it introduced went on to flourish. Now, ten years later, that chilly feeling is back.
Before we drop too much into what we can learn from history, let’s see what the companies are telling us with these announcements. The answer is… (may I have the envelope please?) virtually nothing. The announcements create far more questions than answers. Altera’s response was short and sweet. They had an important customer… wait, strike that… SEVERAL important customers request the MIPS architecture, so they licensed the technology (the MIPS32 processor architecture) from MIPS. According to the MIPS press release, the agreement is “marking the entry of the MIPS® architecture into the FPGA channel.” Wrong, but well-intentioned (but we’ll get to that later).
Xilinx and ARM had some more meat to their announcement. The companies are apparently cooperating on both processor architectures for use in FPGAs and IP interconnect strategies for FPGAs. Specifically… OK, specifically basically nothing. Xilinx will use the AMBA bus in FPGA applications and is cooperating with ARM on the development of a next-generation AMBA that will work even better. Xilinx will also adopt ARM Cortex processor IP. In fact, the press release says that Xilinx will “adopt the complete range of ARM technology…” Wrong, but a nice sentiment. The whole range? Really? We don’t think so.
Now let’s fire up our Journal FPGA-back machine, and set the date on Sept 25, 2000. (Insert special sound effects here.) Whoa! Look at that! We find a press release from Altera that contains:
“With the integration and design flexibility of Altera’s APEX programmable logic architecture and our MIPS Technologies processor cores, Altera is able to provide customers with a truly complete system-on-a-programmable-chip solution with the Excalibur products,” said John Bourgoin, MIPS Technologies, Inc. chairman, president and CEO.
AND
“The combination of ARM’s industry-leading microprocessor core technology, the AMBA bus architecture, and Altera’s programmable logic solutions will provide broad market access to all system level designers in need of meeting stringent time-to-market requirements,” said Mike Muller, executive vice president for ARM Limited. “Altera’s leading-edge system-on-a-programmable-chip solutions will allow designers complete system-level integration, while bringing advanced embedded processor technology to the broad marketplace.”
Hmmm… So back in 2000, Altera made – almost exactly – BOTH of the announcements we got this week. The difference was – they actually gave us specific details. Back then, Altera announced (and shipped*) a family of FPGAs with either ARM or MIPS hard-core processors built in. The outcome? The market didn’t really notice at all.
* we think they shipped. We’ve never actually heard of anyone who purchased one of these. If you know one, send us a note.
Let’s mull on that bit of history for a moment as we gather our list of 9 big questions about the current announcements.
1) Do Xilinx and Altera actually plan to use ARM and MIPS cores in their FPGA products? If so, which architectures?
ANSWER: Neither company is saying they actually plan to put ARM or MIPS cores on their FPGAs. Neither company has identified a specific architecture that they are licensing. The most detail we’ve gotten is “Cortex” from Xilinx and “MIPS32” from Altera.
SPECULATION: It would make sense for both companies to make FPGAs with versions of these processor architectures. With FPGAs becoming increasingly popular as embedded systems platforms, it makes sense for the two most popular processor architectures to be available on FPGAs. If they’re not planning to use the cores in their products, it seems silly to make these announcements. Of course, FPGA companies have done many, many, many silly things in the past.
2) Will these architectures be available as soft cores, hard cores, or both?
ANSWER: Neither company is saying anything about plans for use of the processor architectures. Nada, zip, nothing.
SPECULATION: We guess that these announcements foreshadow hard-core implementations of both ARM and MIPS cores in future Xilinx and Altera devices. Soft cores are already available – including the ARM Cortex-M1, which was designed specifically for FPGA implementations. You could license that processor already – for either Xilinx OR Altera – before either of these announcements was made. We’re pretty sure MIPS would let you license their cores for FPGA use too. The point is, both of those situations would involve you licensing the core, not Xilinx and Altera. For the FPGA vendors to license (as they are now announcing) it means they would have plans to do something with the core themselves – like implement them as hard cores in their FPGA families.
However, both companies offer their own proprietary soft cores that perform better, occupy less FPGA fabric, and offer more flexibility than the ARM Cortex-M1. Why, then, would people choose a soft-core ARM for their FPGA design? It would likely be about the expansive ARM ecosystem, previous experience with the architecture, or the ability to migrate up or be compatible with ASIC implementations using other ARM devices.
Hard-core implementations would offer lower power consumption, higher performance, lower silicon cost, and a little less flexibility than the soft-core versions. In the past, putting a hard-core processor on an FPGA was a risk because: A) You didn’t know which specific processor core to use. B) It ran up the cost of your device – even for people that weren’t using the processor. C) You didn’t know how many processor cores to include. With today’s process nodes, however, (40/45nm moving to 32nm for the next generation) a hard processor core occupies almost negligible silicon area. That means the only cost for the FPGA company to provide it is the licensing fee. Probably (and this is pure speculation) they could make a deal where the processor core was always present and was only activated and licensed if used by the customer. If that’s the case, putting several hard-core processors on every FPGA would almost be a slam dunk.
3) Will these announcements apply to high-end lines like Xilinx Virtex and Altera Stratix, or to low-cost lines like Xilinx Spartan and Altera Cyclone, or both?
ANSWER: Neither company is saying anything about that.
SPECULATION: If we were doing it, we’d include the cores in both high-end and low-cost families. Given the cost structure of these devices, nobody is going to switch from low-cost FPGAs to high-end FPGAs just to get a processor core. Your project is generally either a low-cost FPGA project or a high-end FPGA project, and your BOM can’t handle the latter, or the former can’t handle your design. Both types of projects could make good use of embedded processor cores, however, and, given our cost assumptions above, even a low-cost FPGA wouldn’t gain much silicon area from the addition of a processor at today’s tiny geometries.
4) What do these announcements mean for existing Xilinx and Altera processor solutions like Xilinx’s PowerPC and MicroBlaze, and Altera’s Nios II?
ANSWER: Both companies insist that their customers using their current architectures will be completely supported, and they have no plans to abandon those architectures.
SPECULATION: Well, except for Xilinx, that is. Xilinx has obviously and notably omitted the PowerPC architecture from any of their Virtex-6 product announcements. PowerPC hard-cores have been available on Xilinx FPGAs since Virtex-2 Pro. With Virtex-6, PowerPC is conspicuous by its absence. We think they’ve been planning this for awhile. If we were Xilinx, we’d replace the PowerPC hard core with a new ARM architecture. Of course, we would continue to support existing PowerPC customers. They will too.
On the subject of soft cores, however, we think it would be crazy for either FPGA company to abandon their existing soft-core processor architectures. Both MicroBlaze and Nios II are very good architectures and are technically superior to anything ARM or MIPS has released for soft-core FPGA implementation. Both processors now have large and loyal followings (considering that they are only FPGA-based architectures). There are already ARM and MIPS alternatives available for soft-core implementation.
5) Will Xilinx also do a deal with MIPS? Will Altera also do a deal with ARM?
ANSWER: Neither company is saying or even implying anything.
SPECULATION: ARM is the leader – by far – in embedded processors. Just based on that fact, it would probably be smart for Altera to license and provide the ARM cores as well. However, ARM is the leader in embedded processors mostly because so many of them are licensed for use in mobile phones. Are you planning to put your FPGA in a mobile phone? We didn’t think so. If you take that out of the picture, MIPS is actually very strong in areas like set-top boxes where use of an FPGA in a consumer-volume product is not out of the question. Based on that, and because we already decided that Altera should license ARM, Xilinx should license MIPS just to avoid coming up short.
6) Hasn’t Actel been doing this ARM/FPGA thing for years?
ANSWER: Yes, in fact, they have.
SPECULATION: Comparing Actel to Xilinx and Altera, however, is mostly apples and oranges, despite the fact that all of them are FPGAs. Actel’s flash-based devices tend to be lower power, smaller, cheaper, and slower than their SRAM-based counterparts from Xilinx and Altera. Because the FPGAs are different and target different markets and applications, the dynamics of including a processor core are completely different as well. Carry on, Actel. Nothing to worry about here.
7) What role does the non-processor part of these announcements play – like AMBA interconnect, IP, and memory?
ANSWER: Xilinx says that AMBA (and particularly the not-yet-announced next-generation AMBA) will form a key part of the strategy for interconnecting ALL IP in FPGAs, not just IP that relates to processors. They go farther to show that these connections can be on-chip or off-chip. Xilinx paints a picture that AMBA represents a new era in plug-and-play (and also “design-and-sell”) IP.
SPECULATION: Many people will still want their processors outside of their FPGAs. The AMBA strategy lets you put an ARM processor next to your FPGA and presumably put all or most of your peripherals on the FPGA – along with some possible compute acceleration for things like signal processing algorithms. The combination gives rise to the idea of a two-chip architecture that could solve a wide variety of very difficult problems. We’d expect people to start making general-purpose development/prototyping/production boards using exactly this combination.
8) Why would customers want the solutions implied by these announcements?
ANSWER: The companies don’t really go into that.
SPECULATION: Picking a processor is about much more than the technical merits of the processor itself. Intel proved that when they came to dominate the PC architecture space, not because of their processors, but because of their development kits. The same thing is true in embedded design today. Most processor architectures are very good. The best one for you is likely the one with the most robust ecosystem including tools, IP, reference designs and libaries, peripherals, interconnect, and so forth. The best one for you may also be the one you and your engineers have used before. This makes a strong case for the value of both ARM and MIPS cores in FPGAs.
FPGAs make spectacular system-on-chip (and system-on-2-chips) platforms. The one-two punch is the flexibility of FPGA fabric in configuring the non-processor part of an embedded design, combined with the ability of FPGAs to do compute acceleration. Those two factors combined with the very attractive power, cost, performance, and integration trade-off space that FPGAs afford makes using an FPGA with an ARM or MIPS core a strong contender for a huge range of applications.
9) Why will the idea – which failed so dismally last time – work this time around?
ANSWER: What last time? Didn’t you read the press release? This is all new ground.
SPECULATION: There is an enormous difference between the (admittedly seemingly identical) announcements today and 10 years ago. Back then, FPGAs were expensive, power-hungry, and not that rich in fabric and silicon resources. Altera’s Excalibur devices combined processor cores that were valued for being small and power-efficient with an FPGA fabric that was big, expensive, and power hungry. The combination did not match the needs of many design teams at the time. For FPGA customers, the processors added little value compared with the premium that they added to the FPGA cost. The architecture was structured such that the processors didn’t work all that well with the rest of a system squeezed into the FPGA fabric, and the performance of the whole thing was extremely poor by today’s standards.
Today, FPGAs are much bigger, much faster, much cheaper, and built on process technology that makes the silicon cost of the hard-core processor much, much lower. All of these factors are major game changers, we think, in the viability of the solution.
Here at FPGA Journal, we are waiting for a number of additional shoes to drop.
