feature article
Subscribe Now

Auld Langxiety II

This Time, It's For Real

Should 2008 be forgot, and never brought to mind?  

Should global economic downturns be ignored, and days of auld lang syne?

A few years ago, in the United States, tax laws were passed that made it attractive to “flip” houses by buying them, fixing them up, and quickly selling them for a big profit – mostly tax-free profit.  Many Americans made substantial amounts of money by moving every year or two to a different residence and reaping the rewards.  Of course, all this rapid turnover and appreciation in the housing market pushed home prices up quickly.  Soon, in many areas, the average home buyer could not afford the average home.  This was not good for real-estate and mortgage companies.  They needed to be constantly selling properties and writing new mortgages to make a profit.  They came to the rescue of the average home buyer by creating new mortgages with very aggressive terms, allowing people to qualify for home purchases they could not otherwise afford.  Sometimes, these loans had artificially low interest rates, reduced first-year payments, and even negative amortization as part of the “magic” that allowed consumers to qualify for credit they could not normally manage.  As long as property values continued to rise at an unnatural rate, however, everybody would be safe.  

Of course, property values did not continue to rise.  Mortgages with escalating payments came due, and home owners with non-escalating incomes could not make the payments.  Mortgage companies foreclosed and started trying to re-sell the homes to recoup their investment.  As the number of foreclosures mounted, the availability of properties pushed prices downward.  With property values dropping below outstanding loan balances, defaults mushroomed.  It seemed that many consumers found it easier to default than to try to make up a negative equity when selling a house.  Soon, the mortgage companies were in trouble and, with them, all the securities and funds that were based on mortgages.  After that, as we all know, the world’s largest financial institutions began failing, and the world was thrust into one of the largest economic crises in a century.  Welcome to the last half of 2008!

What does this have to do with FPGAs?  

Well, as the crisis expanded, consumers stopped consuming, manufacturers stopped manufacturing, and the slump found its way to the electronics industry.  Many of us work for technology companies that are dramatically reducing budgets.  Some are laying off employees, including engineers.

What does a winning high-tech company to do in times like these?

We engineer.

Manufacturing is always a game of supply and demand.  In boom times, we can sell just about everything we can push off the end of the assembly line.  Engineering takes a back seat to production. Companies, given the choice between investing in engineering and investing in increased manufacturing capacity, push their budgets into production.  When times get lean, however, the equation is reversed. Additional manufacturing capacity is not needed.  What we DO need are better, more differentiated products that break the commodity model and command a premium price.  This is the time for engineering.

Companies that engineer new and innovative products during a downturn are best positioned to emerge from the crisis with clear competitive advantages.  For us, as engineers, now is the time to say “Put me in, coach!”

In this age of powerful programmable logic devices, cheap software tools and development boards, and vast libraries of powerful, available IP, designing new and innovative digital electronic products is unbelievably inexpensive.  With our ability to build embedded systems entirely on FPGAs, the potential for development of innovative, intelligent products is almost unlimited.  

Most industry forecasts say that semiconductors will take a hit in 2009. Many of these forecasts say that the FPGA market will come out on the good end of that.  While FPGA companies have been facing tough times, most have solid move-ahead plans for 2009.  In 2008, Xilinx continued to work on expanding the market for their existing product lines.  They pushed hard into embedded systems on FPGAs, DSP on FPGAs, and high-speed interconnect, as well as vertical markets like automotive, consumer, and mil/aero.  Altera launched the FPGA industry into 40nm territory for the first time and expanded their support for embedded processors on FPGAs.  Lattice struggled financially but kept their technical focus on differentiated programmable logic products like non-volatile FPGAs, low-cost FPGAs with SerDes, and low-power CPLDs.  Actel was all about power – practically re-branding the company under the “Power Matters” banner and accompanying the rhetoric with a robust line of flash-based products that cover every corner of the power-stingy, high-volume programmable logic market.  QuickLogic continued their re-branded life as a “CSSP” company – burying the banner of FPGAs behind “we design it for you” services and IP.  QuickLogic’s new product lines include specialized devices like their Visual Enhancement Engine – a chip with mobile-display-improving technology along with programmable fabric that allows customization for your particular application.

New FPGA companies came to light in 2008 as well, including SiliconBlue – who launched a new super-low-power architecture, and Achronix, who came in at the high end with 1.5GHz performance and copious quantities of SerDes transceivers.  

On the tools side, while EDA has suffered lean times of late, there are significant advances in tools and IP for programmable devices.  Now, with Synopsys’s acquisition of Synplicity and Magma’s support of Achronix and other new FPGA families, 3 of the 4 major traditional EDA companies have an important stake in the FPGA tools market. Altium continues to re-define desktop EDA with fully-integrated, soup-to-nuts design systems that take advantage of the notion of programmable hardware and the fact that most designs today contain at least one FPGA.  With their Altium Designer, you can do everything from FPGA design to embedded software development to 3D board design – including prototyping on the company’s modular development boards.

The FPGA vendors themselves also continued to invest heavily in tool development: all of the major vendors rolled out new versions of their comprehensive tool suites in 2008, and the main themes were embedded development, DSP design, power estimation and optimization, and timing closure.  With the increasing size and complexity of FPGA designs, all of the companies also made strides in reducing runtimes and improving timing closure iteration.  

Along with more complexity came the need for greater levels of design abstraction.  The theme of system-level design tools – including C/C++ synthesis, hardware/software co-design, hardware algorithm acceleration, and high-level modeling/verification – continued to gain traction with the FPGA audience.  The promise of high-level design – faster design times and increased flexibility – matches well with the benefits of programmable logic, and the combination is seeing increased use in everything from video processing to supercomputing.

Over the next year, we at FPGA Journal will continue to support you in your FPGA-based engineering.  We’re excited to tell you about new products that are rolling out, new companies that are entering the programmable logic space, and new applications of our favorite technology that are surprising even us.  For our part, we’re entering 2009 stronger than ever, with the largest audience we’ve ever served, and with almost boundless determination to bring you more of everything you like about FPGA Journal.  

Remember, we like to hear from you, so drop us a line and tell us what you’re thinking.  We’re thinking that 2009 will be a lot more fun than the pundits are predicting.  Have a happy new year!

Leave a Reply

featured blogs
Aug 16, 2018
Learn about the challenges and solutions for integrating and verification PCIe(r) Gen4 into an Arm-Based Server SoC. Listen to this relatively short webinar by Arm and Cadence, as they describe the collaboration and results, including methodology and technology for speeding i...
Aug 16, 2018
All of the little details were squared up when the check-plots came out for "final" review. Those same preliminary files were shared with the fab and assembly units and, of course, the vendors have c...
Aug 15, 2018
VITA 57.4 FMC+ Standard As an ANSI/VITA member, Samtec supports the release of the new ANSI/VITA 57.4-2018 FPGA Mezzanine Card Plus Standard. VITA 57.4, also referred to as FMC+, expands upon the I/O capabilities defined in ANSI/VITA 57.1 FMC by adding two new connectors that...
Aug 14, 2018
I worked at HP in Ft. Collins, Colorado back in the 1970s. It was a heady experience. We were designing and building early, pre-PC desktop computers and we owned the market back then. The division I worked for eventually migrated to 32-bit workstations, chased from the deskto...
Jul 30, 2018
As discussed in part 1 of this blog post, each instance of an Achronix Speedcore eFPGA in your ASIC or SoC design must be configured after the system powers up because Speedcore eFPGAs employ nonvolatile SRAM technology to store its configuration bits. The time required to pr...