feature article
Subscribe Now

Merging with Agility

Alliance Unlocks FPGA Potential

We’ve talked many times about the potential of FPGAs in providing incredible amounts of the Good kind of power (computing) while consuming comparatively tiny amounts of the Bad kind of power (“juice”).  When you want a lot of numbers manipulated very quickly with the least possible amount of juice, a highly parallelized datapath implemented in the programmable fabric of an FPGA is hard to beat.  That’s why we have groups like the die-hard fringe of supercomputing – the “reconfigurable computing community” struggling for decades to build a tool infrastructure that can more easily get more of those big ’ol algorithms squished down into FPGAs. 

As we’ve pointed out many times, one of the most demanding applications for FPGA-based datapath acceleration is DSP (or any algorithms with DSP-like properties in areas like video processing).  FPGAs today come loaded with DSP-specific blocks like hardware multipliers or multiply-accumulate (MAC) units.  While the FPGA companies’ “maximum performance” specifications are mostly a joke (they multiply the number of MAC units by the maximum frequency and come up with a GMACs [Giga Multiply-Accumulates per second] number that’s far north of anything a real design could possibly achieve), the real-world performance results are still amazing.

What hasn’t yet become amazing is the simplicity of the design flow required to get a complex datapath algorithm into FPGA hardware or, more realistically, into a combination of embedded software and FPGA-based hardware accelerators.  Most DSP designers start with their favorite tools from The Mathworks – MATLAB and Simulink.  MATLAB provides a near-ideal environment for basic algorithm development and refinement, and Simulink facilitates model-based design and adds a few more features of particular interest to hardware designers.  Of course, it also comes with a much bigger price tag.  This proves that the group of people bright enough to bring the world MATLAB is also bright enough to know that typical commercial electronic design projects have much bigger budgets than the typical college math professor.

We have discussed a number of DSP development flows that revolve around model-based design with Simulink, but very few that exploit the power of language-based design at that level of abstraction.  Earlier this year, two of the companies focused on development of high-performance hardware/software systems for DSP design – Celoxica and Catalytic, came together to form a new company – Agility.  Agility will focus on taking algorithms from MATLAB to implementation in a combination of hardware and software.  Catalytic already had a strong portfolio of tools for signal processing design, verification, and implementation, and the addition of Celoxica’s C-to-FPGA tools rounds out the solution so that ultimately a clean tool flow will take algorithms from MATLAB to C and FPGA hardware. 

When starting from the freeform world of MATLAB, a lot of things need to be nailed down before we can get to something that is correctly described either in C that can be executed on an embedded processor or in a hardware description that can be implemented in FPGA fabric.  On the software side, MATLAB kindly protects us from issues like dynamic memory allocation, strong typing of variables, vector vagaries, and a host of others.  When we want to take MATLAB code into something we can successfully execute in C on a typical embedded system that perhaps doesn’t allow dynamic memory allocation, it gets a little more challenging.  Moving algorithms (or parts of algorithms) into hardware introduces even more complex issues like translation from floating-point to fixed-point and narrowing bit-widths to appropriate sizes for hardware implementation (quantization), hardware resource allocation and scheduling, construction of proper I/O interfaces, and creation of appropriate datapaths and controllers. 

The combined forces and technologies of the new Agility are well suited to address these issues.  Celoxica brought proven technology to the table for converting C into high-performance FPGA hardware, and Catalytic brought technology for getting from MATLAB’s M language to C.  From 50,000 feet, it would appear that the path from M to C and then from (some of that) C to FPGA hardware could be covered by the combination of the two companies’ combined technologies.  Of course, the air is very thin at 50,000 feet, so we can sometimes get lightheaded and fail to see things clearly.  A closer look reveals that Agility does not yet have a full production design environment that combines the two design flows the way one would hope.  Like any EDA merger, getting all that code to play nicely together will take some time and some focused engineering effort. 

Unlike most EDA mergers, however, these engineering teams have no gigantic constellation of other products and projects to distract them.  The fate of this company depends on making this flow work and providing a clean flow from MATLAB to optimized hardware and software.  While other flows (such as the model-based design flows from Simulink) can accomplish that feat to some degree, designs where real differentiation is part of the algorithm can’t usually be constructed by snapping together pre-existing models.  In these cases, Agility promises to yield real value. 

While some of the tools that move from algorithm to hardware are intended for hardware designers, Agility is going squarely after the software developer.  For the legions of DSP experts whose applications are outgrowing high-end DSP processors, or whose power, cost, or board area budgets can’t afford the DSP that would meet their computing needs, a clean path to FPGA implementation without the requirement for learning HDL is a key enabler.  With the current proliferation of FPGAs with embedded processors, solving the entire implementation problem, including embedded software and hardware accelerators and the partitioning of functionality between the two, is a pivotal opportunity. 

Agility is a new team with a new challenge ahead of them, but they bring a lot of technology and experience from Catalytic and Celoxica that could jump-start the new company and propel them to success in a key emerging market.

Leave a Reply

featured blogs
Jun 21, 2018
Doing business today isn’t quite like it was back in the 80’s. Sparkling teeth and x-ray vision shouldn’t be a side effect of a customer using your product. This, of course, is said in jest, but no longer do we sell only a product; but a product and physical...
Jun 21, 2018
Welcome back to our series on cloud verification solutions. This is part two of a three-part blog'€”you can read part one here . The high-performance computing (HPC) market continues to grow. Analysts say that the HPC market will reach almost $11 billion by 2020'€”that'€...
Jun 7, 2018
If integrating an embedded FPGA (eFPGA) into your ASIC or SoC design strikes you as odd, it shouldn'€™t. ICs have been absorbing almost every component on a circuit board for decades, starting with transistors, resistors, and capacitors '€” then progressing to gates, ALUs...
May 24, 2018
Amazon has apparently had an Echo hiccup of the sort that would give customers bad dreams. It sent a random conversation to a random contact. A couple had installed numerous Alexa-enabled devices in the home. At some point, they had a conversation '€“ as couples are wont to...
Apr 27, 2018
A sound constraint management design process helps to foster a correct-by-design approach, reduces time-to-market, and ultimately optimizes the design process'€”eliminating the undefined, error-prone methods of the past. Here are five questions to ask......