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What’s a CSSP

QuickLogic Reshapes Mobile Options

If you’re designing portable or battery-powered devices for medium- to high-volume production, you’ve already run into the problem.  You need to control a hard disk, re-format the output of a video driver for a special LCD display, connect to some emerging and possibly obtuse I/O standard – or maybe do all three.  There is no standard part that cuts the mustard.  You may take an off-the-shelf ASSP and try to fix it with a programmable device like a CPLD, but the CPLD may not have enough capability, and you’re still faced with two chips worth of footprint, power, and inconvenience.

Furthermore, you’re delivering your product into a number of geographies and with a number of different feature sets.  Each one (of course) requires slightly different hardware, so you really need not just one solution, but ten, or twenty – or you need a single device with lots of standards built in.

What you want is your own standard product, like an ASIC, only without the huge NRE, the long design cycles, the project risk, the design team expertise required and…  Well, you get the picture.  An ASIC is probably out.  An FPGA might do the job, but they typically have power and cost profiles that won’t work within your BOM and battery budgets.  Basically you’re stuck.

QuickLogic apparently heard your cry, and they’re here with what they call a “CSSP” or customer-specific standard part.  You can pick out the things you need from a library of QuickLogic-supplied blocks (which include both hardware and software components).  Your semiconductor sushi-menu includes things like CE-ATA/IDE, ATAPI, Managed NAND flash control, USB, SD/MMC controllers, SDIO/SPI, Bluetooth UART, and many more – along with the associated drivers for Linux, Windows Mobile, or CE.  You pick out whichever of these your product requires, chat with QuickLogic applications engineers about that couple of special custom logic blocks unique to your project, and faster than you can download and learn an HDL simulator (but you don’t need to because QuickLogic handles the design side of things), you have working chips dropped off on your doorstep.  It’s like magic – or, well, almost.

For full disclosure – QuickLogic used to be an FPGA company.  The problem was, they were always over in the corner of the FPGA playground, climbing on the monkey bars when everybody else was on the slide, or happily banging away at four-square ball when the other kids were playing kickball.   You see, QuickLogic’s FPGAs were based on an unconventional technology they call Vialink – a metal-to-metal antifuse process where programming consists of melting some metal together to create the desired routes and truth tables.  Compared with a conventional FPGA, the advantages included: much lower static power consumption, higher speed, better immunity to radiation, and no requirement for extra configuration circuitry.  On the downside, the devices were one-time programmable, which made FPGA people nervous.  They want the ability to re-program their devices in-system (or at least in their development boards), and they didn’t know quite how to work with QuickLogic’s cool little chips.

Cleverly, QuickLogic re-defined themselves last year.  Instead of being the world’s smallest FPGA company targeting niche areas of the programmable logic market, they became the world’s largest (and only) CSSP company.  This solved a number of problems for both QuickLogic and their customers.  You see, a second issue the company faced in its FPGA days was design tools.  In order to customize an FPGA, you typically need to write, debug and synthesize HDL code.  As an FPGA company, you have to supply tools, training, and support to your customers for that activity.  As the smallest of the active FPGA companies, QuickLogic had a hard time getting their fair share of attention from tool and IP vendors, so they had to go it alone.  With their CSSP strategy, customers don’t need design tools – the detailed design work is all completed by QuickLogic.  That saves you from having to master VHDL or Verilog and it saves QuickLogic from having to provide and support design tools.  From our perspective, this amounts to a win-win situation.

QuickLogic bases their solutions on two platforms (formerly known as FPGAs).  The PolarPro platform is a family with four members ranging in size from 8 CBBs to 240 CBBs (we’ll explain what a CBB is in a bit).  The ArcticLink platform comes in one size – 20 CBBs, but it includes a number of hard-logic blocks pre-wired into the device.  These hard-logic blocks allow the efficient implementation of such elements as the high-speed transceivers required for USB 2.0 and high-speed SD/SDIO/MMC/CE-ATA host controllers.

A CBB, or Customizable Building Block, is QuickLogic’s unit of currency for implementing various logic functions in a device.  Their menu of available functions specifies a number of CBBs required for each, and you just need to pick a device with enough CBBs to hold all the functions you want.  For example, if you need an IDE Host (6 CBBs), a Compact Flash host (6 CBBs), and a 3Mbps UART (5CBBs), you require 17 CBBs total, so you’d need at least the 20CBB PolarPro device.  If you wanted to throw a USB 2.0 HS OTG into the mix – well that’s a trick question.  You’d need the 20CBB ArcticLink device because the USB 2.0 support is available only with Arcticlink’s hard-logic implementation.

QuickLogic CSSPs are available in a wide range of packages ranging from a tiny 6X6mm package up to 12X12mm.  They’ve even worked with customers to produce specialized versions of the smallest package to accommodate a 4-layer board with a reduced I/O count.  Since CSSPs are not FPGAs (as we mentioned before), you don’t need any extra flash or configuration controllers.  The devices are permanently programmed and live at power-up.  Think of it as an ASIC, except you don’t have to design it, pay an NRE for it, or wait for it to come back from the fab.  The devices you’ll use are already built and in inventory, just waiting for a trip through QuickLogic’s metal-melting customization process.

A number of design teams have already jumped on the CSSP bandwagon, for projects ranging from converting horizontal scan with a cheap, off-the-shelf video driver into vertical scan for a handheld-size LCD display to controlling a low-power HDD setup for portable storage devices.  CSSPs offer an excellent option in the trade-off curve between the high-risk, high-effort, long-lead-time ASIC and the high-power, high-unit-cost, complex design cycle of FPGAs.  CSSPs should be the easiest to implement of the pack (by far), with other properties like speed, power consumption, unit cost, and turnaround time that pick the best from both of the other camps.

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