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Field Programmable Journalism

Learning from a Programmable Publication

Content and concept are an interesting combination. People read FPGA and Structured ASIC Journal each week to learn from its content – articles, announcements, analysis, advertisements, and alliteration — all of them working together to inform and entertain engineers interested in programmable logic and structured ASIC design. Interestingly, it turns out that there’s a lot we can learn about programmable logic from FPGA Journal’s concept, too. That’s because FPGA Journal is to technical publications what FPGAs are to system design – highly flexible, fast to market, field programmable, field upgradeable, and at times, a fair bit of fun.

You choose an FPGA because, perhaps, your design needs to get to market fast without all the process hurdles of a custom ASIC or even a board. Using an FPGA on a readymade board, you can whip up a complex custom circuit with a very small team in nothing flat. Each Monday, using our online publishing system, we create a new issue of the FPGA Journal and Embedded Technology Journal newsletters, update the websites to match, and distribute the two publications to over 26,000 subscribers in less than 24 hours. While you may argue that daily newspapers have been pulling off comparable feats for a century or so, we do the entire operation, including delivery (Did I mention that we deliver to over 85 countries?) with single-digit layout, publishing, and distribution staff. That digit is also less than five.

A few months ago, using an Altium development board and design software (and my full editor-engineering super powers), I managed to reproduce a working version of a video game from the 1970s using a low-cost Xilinx Spartan or Altera Cyclone FPGA. Or?! Yep, you bet. Altium’s board has a socket-mounted module that lets you change FPGAs in about 5 seconds. My design was (almost) vendor-independent, and making it work with either company’s FPGA was (nearly) trivial. It took me only a few hours from the time I took the development board out of the box for the first time until I had FPGA-generated virtual (square) balls and paddles sliding around on my VGA monitor. As with FPGA Journal’s online publishing system, the reprogrammable FPGAs, the development board, and the design software allowed me to be hundreds of times more productive than those using older technologies (like the folks who designed the original version of the video game).

Print publications are like the ASICs of the publishing world. When compared with the online alternatives, there’s a much longer lead time, many more verification steps before you go to press (publishing’s tapeout), and a great deal more expensive staff, tools, and infrastructure required to get the job done. Once you’ve made the commitment to go to production, there are huge barriers to going back to make a correction, if it’s even possible at all.

With your FPGA design, you have the advantage of being able to make changes very late in the design cycle, without having a big impact on your design team, schedule, or cost. (OK, board designers, we hear you. Yes, those last minute pinout changes are may seem catastrophic, but that’s peanuts compared with an ASIC re-spin.) In online publishing, we can make changes very late in the game, too. A few weeks ago, we got a helpful call from an informed source on a Tuesday morning regarding an article that was publishing that same day. After a brief interview, we did a complete re-spin of the major section of the article, whipped through a few layout changes, and pressed the big green “Go” button. Less than three hours after the interview was completed, people 10,000 miles from our home office in Portland, Oregon were reading the article in FPGA Journal. Try that with your print publishing process!

Some companies take advantage of the reprogrammability of FPGAs to allow design changes even after the design is in the hands of the end customer. Since hardware, like software, can be updated with downloadable patches, the life of a system in the field can be dramatically extended. Errors not detected in the original design can be corrected in the field without demanding a product recall or an expensive hardware replacement. A few times, we’ve gotten the dreaded call shortly after publishing a new issue of FPGA Journal: “We were just reading this week’s article, and, while we enjoy it very much, you seem to have misspelled the name of our Vice President of Engineering.” Two minutes later, the article was corrected, and readers worldwide were browsing the new revised version, oblivious to the earlier error. That’s nice for a publication, but much nicer for an electronic product.

The dynamic, real-time, reprogrammable model of our publication isn’t limited to our editorial content either. Advertising in an online environment is a whole different ballgame from that in print media. Because ads are dynamically served when you read a page (or an e-mail), errors can be corrected and changes made on the server side. We can fix an error in an advertisement on the web, or even in an e-mail that’s already been sent, by simply replacing the graphic or link on our ad server. The next time you see it, it’s fixed. We can also tailor different versions of the advertising in the publication for different target audiences and locations, all using the same underlying design and layout. It’s like using an FPGA to make different product variants for different geographies or different feature sets. One design becomes many.

FPGAs also end up being more ecologically friendly than many other system design options. Re-useable devices and boards keep loads of failed prototypes out of landfills. New green, lead-free, eco-friendly packaging makes the FPGAs that do get retired nicer citizens of the dust bin. Also, by keeping products in the field longer, we reduce the need to replace them and thereby cut down on the constant churn of parts and boards from factory to furnace. Finally, by making the one-platform, many-products process possible, FPGAs cut down on inventory overages and misalignments where we might have, for example, too many NTSC and not enough PAL versions of the product.

Online technical publishing is eco-friendly, too. We don’t kill thousands of trees to get our new edition published each week. We also don’t burn tons of fossil fuels in trucks delivering our product to tens of thousands of locations worldwide. By electronically managing most of our operation, we cut down substantially on the travel required to gather and disseminate high-quality technical information. Most businesses can’t be operated in such an environmentally friendly manner, but we’re happy to be in one that can.

Of course, we didn’t invent online publishing, and we certainly don’t even pretend to be the premier pundits of profundity on the subject. What we did do, however, was to start from the ground up to be an online-only publishing company. That means we can take full advantage of the medium far better than those trying to make an online version of a print publication. Print-to-online is like following your ASIC process to design an FPGA. You end up throwing away most of the advantages and keeping just the clunky parts.

For 2006, we at FPGA and Structured ASIC Journal have planned our best-ever lineup of technical articles, how-to features, special issues, and even a few new surprises. We want to thank you for your continued support and interest. Be sure to drop us a line if you have a few words to say, or drop us a contributed article if you have a lot. Thanks for reading!

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