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Chillin’ with QuickLogic

PolarPro Brings FPGAs to BatteryLand

Deep in the system designer’s psyche, the traditional truths of FPGA are fused with non-volatile, metal-to-metal connections. FPGAs are expensive. FPGAs consume too much power. FPGAs and battery-powered consumer devices are complete non-starters.

QuickLogic should guard their secret carefully – the one about their new PolarPro being an FPGA family. When designers of portable media players are looking for a device that can significantly increase the battery life of their next-generation units, FPGAs will likely be the last place they think to look. After all, FPGAs burn power like toasters. FPGAs are expensive. Nobody in his right mind would think to consider an FPGA to reduce power consumption in a battery-operated, high-volume, low-price consumer device, would he?

In the same fashion we discussed last week in “Thinking Like Xilinx,” QuickLogic is taking the message directly to the target audience. In their product announcement for PolarPro, they discuss the duty cycles of hard-disk drives in portable devices like media players, the impact of HDD operation on battery consumption, and the potential power savings from integrating a PolarPro device. The claims are startling. Can it be true that an FPGA could increase battery life in a portable device by two to five times? Our poor guy on the couch wouldn’t even consider trying to operate an FPGA on batteries.

PolarPro gets its extreme chill from several design decisions. First, PolarPro is a non-volatile, metal-to-metal (we’d call it antifuse, but QuickLogic calls it “ViaLink”) technology. Regardless of what you call it, programming connections within the device are made by melting metal contacts together, and those connections remain for the life of the device. It is not reprogrammable. By giving up reprogrammability, PolarPro avoids having to supply constant power to configuration transistors (as must be done to retain programming in an SRAM-type FPGA). In traditional FPGAs, the majority of static power is burned keeping the configuration alive, so eliminating that component of power consumption is a giant leap backward on the power curve.

Second, PolarPro includes a very low power (VLP) standby mode that drops power consumption to less than 10 uA while retaining state in the device. For applications with low duty cycles, that lets the FPGA practically disappear from the power budget until somebody rings its bell. During VLP mode the I/O pads are isolated from the logic core, making the device remain a good bus citizen, even while it’s sleeping. VLP mode can be entered (and exited) in microseconds, initiated by a host processor using an interrupt scheme. Combined with PolarPro’s I/O isolation, this means that the static power consumption when connected to an active bus is negligible.

Finally, QuickLogic has analyzed most of the power-hungry active functions PolarPro might need to perform in typical target applications and has implemented those functions in ASIC-like optimized hardware. Dual-port RAM, FIFO controllers, DDR interfaces and clock management units are all pre-implemented in highly-optimized hard-IP blocks, saving significant power and reducing the silicon area required for those functions. Shifting those functions to hard-IP also leaves more programmable fabric available for user custom logic.

The combination of these factors makes PolarPro possibly the most power-efficient FPGA on the market, with far lower power consumption than is possible with SRAM- or flash-based FPGAs. The only programmable logic devices that could rival PolarPro’s power stinginess are some of the super-low-power CPLD families with significantly less capability.

Since QuickLogic was targeting PolarPro at the high-volume consumer market, they had to conquer more than just the power problem. Typical programmable logic pricing would put FPGAs far beyond the BOM budget of most consumer-level applications. At high-volume price sensitivities, the support circuitry for a typical FPGA becomes significant as well, so more than just part price enters the equation. QuickLogic did some total-system-cost math with PolarPro, however. Because the device is non-volatile, it doesn’t require the configuration logic of a typical reprogrammable FPGA. (The downside, of course, is that the device can’t be reconfigured once deployed.) Still that’s a couple of BOM items and some board real estate that can be salvaged right off the bat.

PolarPro also supports low-cost commodity memory such as mobile DDR2, reducing the cost burden of other components of the system. Also, thanks to the live-at-powerup nature of metal-programmed FPGAs, there is no inrush configuration current, so power management design is simpler and less expensive. The parts themselves are looking pretty cheap too, with unit costs as low as $2.95 for the 640 logic cell QL1P100 in “high volumes.” If QuickLogic can score a few iPod-like sockets for PolarPro over the next couple of years, “high volumes” is what they’re likely to see.

One problem faced by programmable logic vendors like QuickLogic, whose market share isn’t in the top two, is getting critical time and investment from third-party tool developers. Tool technologies like logic synthesis are critical to the productive use of any FPGA fabric, and customizing logic synthesis tools to support a new fabric is an expensive, effort-intensive process.

QuickLogic has met tool developers at least halfway by emulating the standard 4-input lookup table (LUT4) architecture employed by most FPGA fabric. This significantly reduces the development burden and improves the quality of results for third-party synthesis vendors supporting the new technology. Already last week, Mentor Graphics announced support for QuickLogic’s low-power family with their Precision synthesis tools.

PolarPro is positioned as a part that can bridge processors and peripheral sub-systems in low-power embedded systems such as portable media players and smart-phones. It is a logical step in the strategy that QuickLogic has been pursuing for the past couple of years – to deploy programmable parts that are highly optimized for particular classes of end applications. Clearly this approach challenges the traditional notion of programmable logic as a general-purpose technology. Perhaps the “programmable ASSP” terminology might be more appropriate. With the radical diversification going on in the FPGA market right now, opinions on QuickLogic’s approach may move from “novel” toward “visionary.”

Meanwhile, they just have to convince embedded system designers that an FPGA can actually be used to reduce cost and power, instead of increasing both. Do you hear them? They’re talking to you… softly. You’re lying on a warm beach. Your eyelids feel heavy…

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Chillin’ with QuickLogic

PolarPro Brings FPGAs to BatteryLand

Soft sourceless music flows through the dim-lit scene. The faint smell of incense lingers. The embedded system designer sitting back on the recliner is a relaxed subject, miles from the high-stress world of project schedules and power budgets. The white-robed researcher speaks softly through the microphone, pausing just long enough for the subject’s responses to her word-associations to be heard. “Fire”… “hot”, “Pillow”… “soft”, “Schedule”… “late”, “Water”… “clear”, “Budget”… “over”, “FPGA”… “hot”, “Batteries”… “ASIC”, “Walk”… “run”, “Expensive”… “FPGA”, …

Deep in the system designer’s psyche, the traditional truths of FPGA are fused with non-volatile, metal-to-metal connections. FPGAs are expensive. FPGAs consume too much power. FPGAs and battery-powered consumer devices are complete non-starters.

QuickLogic should guard their secret carefully – the one about their new PolarPro being an FPGA family. When designers of portable media players are looking for a device that can significantly increase the battery life of their next-generation units, FPGAs will likely be the last place they think to look. After all, FPGAs burn power like toasters. FPGAs are expensive. Nobody in his right mind would think to consider an FPGA to reduce power consumption in a battery-operated, high-volume, low-price consumer device, would he?

In the same fashion we discussed last week in “Thinking Like Xilinx,” QuickLogic is taking the message directly to the target audience. In their product announcement for PolarPro, they discuss the duty cycles of hard-disk drives in portable devices like media players, the impact of HDD operation on battery consumption, and the potential power savings from integrating a PolarPro device. The claims are startling. Can it be true that an FPGA could increase battery life in a portable device by two to five times? Our poor guy on the couch wouldn’t even consider trying to operate an FPGA on batteries.

PolarPro gets its extreme chill from several design decisions. First, PolarPro is a non-volatile, metal-to-metal (we’d call it antifuse, but QuickLogic calls it “ViaLink”) technology. Regardless of what you call it, programming connections within the device are made by melting metal contacts together, and those connections remain for the life of the device. It is not reprogrammable. By giving up reprogrammability, PolarPro avoids having to supply constant power to configuration transistors (as must be done to retain programming in an SRAM-type FPGA). In traditional FPGAs, the majority of static power is burned keeping the configuration alive, so eliminating that component of power consumption is a giant leap backward on the power curve.

Second, PolarPro includes a very low power (VLP) standby mode that drops power consumption to less than 10 uA while retaining state in the device. For applications with low duty cycles, that lets the FPGA practically disappear from the power budget until somebody rings its bell. During VLP mode the I/O pads are isolated from the logic core, making the device remain a good bus citizen, even while it’s sleeping. VLP mode can be entered (and exited) in microseconds, initiated by a host processor using an interrupt scheme. Combined with PolarPro’s I/O isolation, this means that the static power consumption when connected to an active bus is negligible.

Finally, QuickLogic has analyzed most of the power-hungry active functions PolarPro might need to perform in typical target applications and has implemented those functions in ASIC-like optimized hardware. Dual-port RAM, FIFO controllers, DDR interfaces and clock management units are all pre-implemented in highly-optimized hard-IP blocks, saving significant power and reducing the silicon area required for those functions. Shifting those functions to hard-IP also leaves more programmable fabric available for user custom logic.

The combination of these factors makes PolarPro possibly the most power-efficient FPGA on the market, with far lower power consumption than is possible with SRAM- or flash-based FPGAs. The only programmable logic devices that could rival PolarPro’s power stinginess are some of the super-low-power CPLD families with significantly less capability.

Since QuickLogic was targeting PolarPro at the high-volume consumer market, they had to conquer more than just the power problem. Typical programmable logic pricing would put FPGAs far beyond the BOM budget of most consumer-level applications. At high-volume price sensitivities, the support circuitry for a typical FPGA becomes significant as well, so more than just part price enters the equation. QuickLogic did some total-system-cost math with PolarPro, however. Because the device is non-volatile, it doesn’t require the configuration logic of a typical reprogrammable FPGA. (The downside, of course, is that the device can’t be reconfigured once deployed.) Still that’s a couple of BOM items and some board real estate that can be salvaged right off the bat.

PolarPro also supports low-cost commodity memory such as mobile DDR2, reducing the cost burden of other components of the system. Also, thanks to the live-at-powerup nature of metal-programmed FPGAs, there is no inrush configuration current, so power management design is simpler and less expensive. The parts themselves are looking pretty cheap too, with unit costs as low as $2.95 for the 640 logic cell QL1P100 in “high volumes.” If QuickLogic can score a few iPod-like sockets for PolarPro over the next couple of years, “high volumes” is what they’re likely to see.

One problem faced by programmable logic vendors like QuickLogic, whose market share isn’t in the top two, is getting critical time and investment from third-party tool developers. Tool technologies like logic synthesis are critical to the productive use of any FPGA fabric, and customizing logic synthesis tools to support a new fabric is an expensive, effort-intensive process.

QuickLogic has met tool developers at least halfway by emulating the standard 4-input lookup table (LUT4) architecture employed by most FPGA fabric. This significantly reduces the development burden and improves the quality of results for third-party synthesis vendors supporting the new technology. Already last week, Mentor Graphics announced support for QuickLogic’s low-power family with their Precision synthesis tools.

PolarPro is positioned as a part that can bridge processors and peripheral sub-systems in low-power embedded systems such as portable media players and smart-phones. It is a logical step in the strategy that QuickLogic has been pursuing for the past couple of years – to deploy programmable parts that are highly optimized for particular classes of end applications. Clearly this approach challenges the traditional notion of programmable logic as a general-purpose technology. Perhaps the “programmable ASSP” terminology might be more appropriate. With the radical diversification going on in the FPGA market right now, opinions on QuickLogic’s approach may move from “novel” toward “visionary.”

Meanwhile, they just have to convince embedded system designers that an FPGA can actually be used to reduce cost and power, instead of increasing both. Do you hear them? They’re talking to you… softly. You’re lying on a warm beach. Your eyelids feel heavy…

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