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Pedal to the Metals

A Crash Course in High-Speed Design

You’re cruising home from work one day, and your cell phone rings. You answer (hands free of course…). It’s your boss. New plan. He’s saying something about routing, but you can’t quite make it out. Your head is spinning. Why didn’t you pay the extra thousand bucks for that GPS system? Your boss is still talking, and you’re trying to make sense of what he’s saying, but it’s all rushing together, plus you’ve reached that “Can you hear me now” section of your commute. You catch a word here and there, but it’s gibberish. Things like, “… Microvia.” Sounds like a small island in the South Pacific, but OK. Then something about constrained nets. Is this some kind of code speak for a speed trap ahead? Well, sort of. In reality, you’ve just been assigned the task of designing your first FPGA-centric high-speed board.

Times have changed since ASICs ruled the board. With an FPGA in the middle of the system, board design has become part of the “on-demand” culture. Pinouts aren’t nailed down months in advance the way they used to be. They can change right up until the last minute. You could be dealing with more than 20 layers of metal. You’ve got high-speed serial signals to deal with. You’ll need routing constraints for the majority of these. And let’s not forget the old stand-bys, the bread-and-butter challenges of high-speed design: signal integrity, jitter, and crosstalk.

Perhaps this isn’t a huge hurdle for you to clear. You have high-speed tools and expertise on your team, and really the only adjustment is working with the process shifts brought on by programmable logic. Or you have the FPGA skills, but need to beef up your board design environment by upgrading to that whiz-bang solution you hear so much about from your trusty EDA vendor. But what if you’re somewhat new to both? The intimidation factor could be overwhelming.

So, where to begin? Turns out you have people lining up, elbowing each other out of the way to help you with their own take on the best way to impress your boss. You also, however, have an equally large number of factors that can impact your decision. You could invest in all the tools and training to create a repeatable in-house process, but do you have the budget, the on-going project need, and the technical expertise for that? It’s probably crossed your mind more than once that this could be a time-consuming – not to mention expensive – experiment. Perhaps it makes more sense to farm the project out to a third party that specializes in high-speed board design. That could be a great solution to solve your immediate need, but may not be the best long-term solution. Or maybe something in between…

Taking on the Tools

Let’s say you’ve decided to bite the bullet and take on the challenge in house. Now it’s just a matter of figuring out which high-speed design solution is best for you. It may sound like you’re near the end of your decision process, but the fun has just begun.

One thing that’s clear is that the right tool or combination of tools is not, well, clear. Most EDA tool vendors offer several “levels” or “tiers” of tools, not to mention their own spin on the best methodology, and finding the best solution for your needs could be a challenge.

Mentor Graphics promotes two board design flows, PADS and Expedition, and both have features to handle high-speed design. At first glance, it seems that you should make your choice based on the size and complexity of your organization. PADS would be a good fit for a small team, and Expedition is tailored to the needs of a global enterprise. Be careful not to jump too quickly here. “A lot of the decision for the best board solution actually rests on the complexity of your FPGA design,” said John Isaac, Director of Market Development, Systems Design Division, Mentor Graphics . “If you’re throwing three or four high-end FPGAs with several hundred differential pair routes that all have to meet tight length matching, max life consideration, maximum number of vias, etc., you’d better be using a higher end system like Expedition that handles these issues automatically. You could get the job done with PADS, but from a productivity point of view, the Expedition flow makes sense, even for two guys in a garage.”

Cadence Design Systems also offers two solutions for board design, OrCAD and the Allegro platform, with Allegro doing the heavy lifting for high speed. “We think the most efficient way to handle the high-speed challenge is with the constraint-based methodology in Allegro, where you can make decisions up front in the design process, create electrical constraint sets, and those constraint sets are then applied to signals and forwarded through the implementation phase,” said Brad Griffin, Product Marketing Director, Allegro-SIP Product Group, Cadence. Within Allegro, you have a choice between the lower-end 200 series and the more robust 600 series. “High-speed designers can do their job using 200 series products both in PCB design as well as in the PCB signal integrity area,” continued Griffin. “They may need to move up to 600 series products if they get into the multi-Gigabit or multi-Gigahertz space.”

Altium’s approach is a bit different from the other EDA vendors. Their Altium Designer product integrates board- and FPGA-level system design, embedded software development for FPGA-based processors, and PCB layout, editing and manufacturing. “We see an active move away from the complexity of the design of the PCB into the FPGA, and we want to facilitate that,” said Frank Hoschar, Managing Director of Global Accounts at Altium. “If you move more of the components from the board to the FPGA, you have less high-speed problems on the board. Rather than viewing the FPGA as a programmable component, we view it as a system on FPGA. Our design methodology is actually close to what you used to do on PCB, so it’s attractive to main-stream engineers.”

This idea of pre-empting high-speed board design challenges on the FPGA is also, as you would imagine, popular with the FPGA vendors. “You can solve many board-level issues on the chip itself,” says Panch Chandrasekaran, Connectivity Marketing Manager at Xilinx. “For example, driving very fast signals on the board can lead to jitter. The chip can solve a big percentage of these problems using equalization techniques that can offset the loss that a signal sees on the board.”

Moving complexity from the board to the FPGA does address many of the issues facing high-speed design, but it also creates its own new set of requirements. You may decide that this approach works for you (particularly if your team’s claim to fame is FPGA design), but know going in that you may be trading a headache for a backache.

Getting up to speed on these solutions is another major consideration. While the Altium suite is designed with a mainstream user in mind, leveraging the horsepower from the Mentor and Cadence solutions may take a bit more ramp-up time. According to Mentor’s Isaac, “High-speed PCBs are very complex, and if you’re going to do one that meets your performance, is cost effective, has the minimum number of layers, and uses high-end technologies, it’s not easy. It’s not a matter of going to a week’s worth of training on the tools.”

Get a Helping Hand

If you’ve decided that your resources are better spent elsewhere and you don’t want to tackle this on your own, you’re not alone. Companies large and small are outsourcing more, not just for manufacturing, but also for design. Here again, there are so many levels to choose from, you may be able to create your own recipe for success. Combine two high-speed experts with one robust toolset. Add a dash of vendor reference design and detailed app note. Stir vigorously. Let set for two weeks. And voilà. (OK, maybe not “voilà” per se, but you’re on your way.)

FPGA vendors can be a great first stop for help. They have a vested interest in making you successful, having stepped up to the plate big time with resources for high-speed FPGA-on-board design. “At Xilinx, we have partnerships with EDA vendors and relationships with design houses to facilitate high-speed design, but we also have internal resources,” said Tom Kozas, Xilinx Design Services Marketing Manager. “We offer training courses if customers want to build up their expertise, but we can also execute a design from beginning to end with our RocketIO design services.”

Altera also offers a number of different resources for high-speed design. “We’ve created high-speed development kits, reference designs, application notes, and other resources to help customers with this complex issue,” said Greg Moore, Senior Manager, High-Speed Design at Altera. “In addition, we have close relationships with third parties to provide services to our customers as part of our Altera Consultant Alliance Program (ACAP), and our Certified Design Center (CDC).

Beyond the FPGA vendors and high-speed consultants, there are many companies that specialize in board design. A quick Google search yields lots of options, but on further examination many are set up for more mainstream board design. One company that actively markets its high-speed expertise is Wipro, which bills itself as having “good experience in high-speed board designs, multi-layered, multi-CPU and high-performance board designs.” Rather than playing this guessing game, gathering references from your FPGA vendor may be the path of least resistance.

Whether you’re simply upgrading your toolset to handle high-speed, or you’re embarking on this process for the first time, spend the upfront effort to ensure that you’ve found the best solution to meet your team’s needs.

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