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Model-Based Design for Xilinx Zynq & Altera SoC Devices

You'll get way more out of your Xilinx Zynq or Altera SoC device if you have a smooth design flow from MATLAB and Simulink. Luckily, MathWorks has already thought of that. In this episode of Chalk Talk, Amelia Dalton chats with Eric Cigan of MathWorks about Model-Based Design for this new powerful class of programmable devices.

Architecture Matters: Three Architectural Insights for SoC FPGAs

New devices that combine the power and flexiblility of FPGAs and conventional processors on a single chip represent a breakthrough in capability. But, understanding the complex architecture of these sophisticated components requires us to look under the hood to see how the architecture fits our design requirements, and how to choose the right chip for our application. In this episode of Chalk Talk, Amelia Dalton talks with Todd Koelling of Altera about what to look for in the architecture of your SoC FPGA.

Inductance-to-Digital Converters Revolutionize Position & Rotation Sensing

Inductive sensing is a reliable, accurate, and robust technology for a wide variety of position, rotation, metal detection and spring compression measurement applications. In this episode of Chalk Talk, Amelia Dalton chats with Anjana Govil of Texas Instruments about how you can use inductance-to-digital converters to take advantage for inductive sensing in your next design.

Powering Non-Isolated 24V Rail Applications Made Easy

Designing the DC/DC power supply for your design is almost never the fun part. And, designing a good power supply can be a complex engineering challenge. In this episode of Chalk Talk, Amelia Dalton chats with Tenille Medley of Texas Instruments about simplifying industrial power design. It may just make your next design project a lot easier.

Stratus™ High-Level Synthesis

High-Level Synthesis (HLS) has been gaining traction in the mainstream for the past couple of years. But, HLS is good for a lot more than just increasing development productivity. In this episode of Chalk Talk, Amelia Dalton chats with David Pursley of Cadence Designs Systems about the new Stratus High-Level Synthesis technology, and how it will impact design productivity as well as the deployment and distribution of IP.

Vivado Design Suite HLx Editions

High-level design methods can dramatically increase your productivity. Now that technologies like high-level synthesis (HLS) have gone mainstream, we can make some serious improvements to our FPGA design process. In this episode of Chalk Talk, Amelia Dalton chats with Tim Vanevenhoven of Xilinx about how the new HLx editions of Vivado Design suite are taking high-level design mainstream.

Mixed Signal Verification: The Long and Winding Road

Verification of your mixed-signal design can be a nightmare, with clashing disciplines and engineering cultures, and challenging use-case requirements. In this episode of Chalk Talk, Amelia Dalton chats with Steve Carlson of Cadence Design Systems about a comprehensive approach to mixed-signal system verification.

Announcing Indago Debug Platform

Debugging your design should be a lot more sophisticated than a bunch of "printf" statements. But that is exactly what many development teams end up using. In this episode of Chalk Talk, Amelia Dalton chats with Adam Sherer of Cadence Design Systems about the new Indago embedded debug system. It will change the way you think about debug.

10 Secrets to Getting a Lower BOM Cost

Reducing your BOM costs can be a complex challenge. If your design includes programmable logic, you have a lot of powerful options for reducing cost that might not be obvious simply by looking at component costs. In this episode of Chalk Talk, Amelia Dalton chats with Maureen Smerdon and Darren Zacher of Xilinx about minimizing BOM costs in your next design.

Performance-per-Watt with FinFET-based All Programmable Architectures

Performance per watt is one of the most critical metrics for most system designers today. In the past, we could often focus on performance without thinking about power, but today's highly-constrained designs demand energy efficiency more than ever. In this episode of Chalk Talk, Amelia Dalton chats with Ehab Mohsen and Maureen Smerdon of Xilinx about optimizing your design for maximum performance per watt.

Meet ARTY: the $99 FPGA Development Kit from Xilinx

Have you been wanting to try FPGA design? Were FPGA development boards and tools always too expensive and difficult to use? In this episode of Chalk Talk, Amelia Dalton chats with Darren Zacher and Jim Burnham of Xilinx about ARTY, a new, easy-to-use $99 FPGA-based embedded development kit from Xilinx.

Altera Stratix 10 Security

Security is a key issue in just about every system design today. And, in FPGA-based systems you need robust security features built into the FPGA itself. In this episode of Chalk Talk, Amelia Dalton and Ryan Kenny of Altera discuss the new security features in Altera's Stratix 10 FPGAs and how they help you address even the most demanding security challenges.

USB Type-C Solutions

USB Type-C is coming, but how will you add it to your design? In this episode of Chalk Talk, Amelia Dalton chats with Gordon Hands of Lattice Semiconductor about a great new flexible solution for USB Type-C. Your job may be easier than you think.

MathWorks Connects to Hardware

The Maker movement is exploding right now, and most of the cool projects require doing some math. In this episode of Chalk Talk, Amelia Dalton chats with Amnon Gai of The MathWorks about using the powerful capabilities of MATLAB and Simulink in anything from your next maker hobby project to full-blown industrial designs.

DC Brushed Motor Applications

Brushed DC motors are the go-to solution for thousands of applications. And, although most of us have experience with brushed motors at some point, few of us have taken the time to become experts. In this episode of Chalk Talk, Amelia Dalton chats with David Witt from Infineon about the finer points of brushed DC motor theory, and they look at some helpful motor control solutions from Infineon.

Analog to Digital Conversion

High-speed analog signals pose special challenges for analog to digital conversion (ADC). Applications like software-defined radio, radar, instrumentation, and high-speed wireless require ADC that is high-performance, high-accuracy, and low-power. In this episode of Chalk Talk, Amelia Dalton chats with Trent Butcher of Microchip Technology about solving the issues of high-speed ADC.

Molex Embedded Vision

When designing advanced applications such as embedded vision, connectors are one of the last things on most engineers' minds, But the selection of the correct connectors for the job can be a make-or-break decision in the success of your product. In this episode of Chalk Talk, Amelia Dalton chats with Tony Ciapetta and Chris Slinkman from Molex about selecting the best connectors for embedded vision design.

Genus Synthesis Solution: Massively Parallel RTL Synthesis

Synthesis of large designs can be a major bottleneck, particularly with the number of iterations often required and the long synthesis runtimes of current generation tools. In this episode of Chalk Talk, Amelia Dalton chats with David Stratman of Cadence Design Systems about the revolutionary new Genus massively-parallel synthesis technology. Genus promises to have an enormous impact on the synthesis bottleneck.

De-Risk Yield Manufacturing Ramp-up with Veloce DFT App

Get DFT off the critical path on your next chip design. In this episode of Chalk Talk, Amelia Dalton chats with Jean-Marie Brunet of Mentor Graphics about how you can use emulation to significantly improve your DFT productivity.

Massive DDR4 Memory Bandwidth with Xilinx UltraScale FPGAs

As FPGA designers, we are always looking for the maximum performance and flexibility in our designs. But, commodity DDR3 memory can be a bottleneck in many systems. In this episode of Chalk Talk, Amelia Dalton chats with Ehab Mohsen of Xilinx about the amazing performance you can get combining DDR4 with Xilinx FPGAs.

Cadence Perspec System Verifier SW Driven SoC Verification Automation

To verify your next system design, you'll need a lot of use cases. But, creating, tracking, sharing, and running those use cases can be a nightmare. In this episode of Chalk Talk, Amelia Dalton chats with Larry Melling of Cadence Design Systems about the new Cadence Perspec System Verifier and how you can take advantage of its power and flexibility in your system-level design verification.

chalk talks

What is Electrically Aware Design?

For years, layout tools have focused on the pins and wires, the "froms" and "tos", the segments and nets - without considering that they were really creating a complex electrical circuit. Today, however, the electrical properties of our layout is critical, and issues like parasitic resistance and capacitance can have a dramatic effect on our final design. In this episode of Chalk Talk, Amelia Dalton chats with John Stabenow of Cadence about electrically-aware design with Cadence's Virtuoso.

Infineon's 8th Generation of RF Transistors Maximize Receiver Sensitivity and Range

If you're designing systems that use the latest WiFi standards, you know that a great RF transistor with high gain and low noise is key to good performance. In this episode of Chalk Talk, Amelia Dalton talks with Andrew Nelson of Infineon about the latest in high-performance RF transistors - Infineon's new 8th generation.

Vivado IP Integrator

Even the best "plug and play" IP blocks are far from fool-proof. One of the most challenging aspects of IP-based design can be getting the blocks stitched together properly, making sure you have the right version of all the IP blocks, and confirming the configuration of your whole design. In this episode of Chalk Talk, Amelia Dalton chats with Tim Vanevenhoven about the powerful correct-by-construction automation built into the IP Integrator in Vivado Design Suite from Xilinx. IP Integrator seriously raises the bar on automation of IP-based design.

High Speed Data Acquisition and Software Defined Radio Made Simple

Building a hybrid computing platform from scratch is a huge and complicated project. Luckily, somebody has already done that work for you. In this episode of Chalk TalkHD Amelia chats with Justin Braun (4DSP) about how you can use pre-designed platforms to dramatically simplify these complex computing and data acquisition problems.

Powering Stratix V FPGAs (Made Easy)

Getting the right power to your FPGA has gotten a lot more complicated, but it doesn’t have to mess up your day or cut into your golf time. In this episode of Chalk TalkHD Amelia chats with Jordon Inkeles (Altera) and Sharad Khanal (Linear Technology) about pairing Altera’s Stratix V FPGAs with Linear Technology’s power modules for a clean, robust, reliable power solution.

Top 10 Reasons Real Signal Integrity Engineers Demand Power-Aware SI Technology

Signal Integrity analysis that doesn't consider power effects can set you up for some dangerous problems. Ground bounce and other effects can cause problems that normal SI tools won't detect. In this episode of Chalk Talk, Amelia Dalton discusses power-aware signal integrity analysis with Brad Griffin of Cadence Design Systems. You'll want to watch to see what your SI tool may have been missing.

Delivering Higher FPGA Utilization & Performance: UltraScale Architecture

Ever notice how hard it can be to get the full utilization that an FPGA datasheet promises? Xilinx is aiming to change all that. In this episode of Chalk Talk, Amelia Dalton talks with Darren Zacher of Xilinx about the new Ultrascale FPGA family, and how the architecture has been optimized for maximum utilization.

High-Reliability in FPGA Design - SEU Mitigation

Neutrons are coming for you and you'd better be prepared. Whether we like it or not, SEUs (Single Event Upsets) are becoming a bigger and bigger problem for our designs, especially for high realibility systems. If you thought SEUs couldn't mess up your next design because you aren't designing something destined for space, you need to think again. In this episode of Chalk TalkHD, I chat with Jeff Garrison of Synopsys about the how we can battle SEUs (on the ground or in the air) with the latest generation of design tools.

latest papers and content

Powering Non-Isolated 24V Rail Applications Made Easy

Designing the DC/DC power supply for your design is almost never the fun part. And, designing a good power supply can be a complex engineering challenge. In this episode of Chalk Talk, Amelia Dalton chats with Tenille Medley of Texas Instruments about simplifying industrial power design. It may just make your next design project a lot easier.

De-Risk Yield Manufacturing Ramp-up with Veloce DFT App

Get DFT off the critical path on your next chip design. In this episode of Chalk Talk, Amelia Dalton chats with Jean-Marie Brunet of Mentor Graphics about how you can use emulation to significantly improve your DFT productivity.

Thermal Management

We often find ourselves needing to measure temperature and take some action in our designs. But, thermal management can be a complicated area, with a lot of alternatives in terms of sensors and supporting circuitry. In this episode of Chalk Talk, Amelia Dalton chats with John Austin of Microchip Technology about the numerous options for thermal management solutions.

Vivado Design Suite HLx Editions

High-level design methods can dramatically increase your productivity. Now that technologies like high-level synthesis (HLS) have gone mainstream, we can make some serious improvements to our FPGA design process. In this episode of Chalk Talk, Amelia Dalton chats with Tim Vanevenhoven of Xilinx about how the new HLx editions of Vivado Design suite are taking high-level design mainstream.

Synplify FPGA Synthesis

Today's FPGAs demand a lot from your design tool environment, particularly when it comes to synthesis. With larger designs, more third-party IP, globally-distributed design teams, and increasing performance and power challenges, the demands on synthesis technology are greater than ever. In this episode of Chalk Talk, Amelia Dalton chats with Joe Mallett of Synopsys about the latest generation of the Synopsys Synplify FPGA design tools.

DC Brushed Motor Applications

Brushed DC motors are the go-to solution for thousands of applications. And, although most of us have experience with brushed motors at some point, few of us have taken the time to become experts. In this episode of Chalk Talk, Amelia Dalton chats with David Witt from Infineon about the finer points of brushed DC motor theory, and they look at some helpful motor control solutions from Infineon.

Molex Embedded Vision

When designing advanced applications such as embedded vision, connectors are one of the last things on most engineers' minds, But the selection of the correct connectors for the job can be a make-or-break decision in the success of your product. In this episode of Chalk Talk, Amelia Dalton chats with Tony Ciapetta and Chris Slinkman from Molex about selecting the best connectors for embedded vision design.

Low Light Surveillance Imaging

Designing embedded vision applications for low-light situations has to start with the right image sensor. Your vision analytics cannot identify what your camera cannot see. In this episode of Chalk Talk, Amelia Dalton chats with Michael DeLuca from ON Semiconductor about low-light surveillance imaging.

The Market Shift to Integrated Physical Prototyping

FPGA-based physical prototyping is the go-to standard for high-performance, high-productivity verification, debug, and software development on many electronic systems today. But, it is becoming increasingly difficult to put together an ad-hoc prototype mixing pieces from various vendors with home-grown components. With the complexity of today's systems, an integrated prototyping system can bring significant advantages. In this episode of Chalk Talk, Amelia Dalton chats with Neil Songcuan of Synopsys about the powerful HAPS integrated prototyping solution.

Cadence Tensilica Vision P5

Intelligent vision systems represent some of today's biggest embedded design challenges. The enormous processing power required combined with small energy budgets rules out most conventional applications processors. In this episode of Chalk Talk, Amelia Dalton chats with Dennis Crespo from Cadence Design Systems about the new Tensilica Vision P5 processors - designed specifically to meet the needs of embedded vision applications.

Introducing Palladium Z1 Enterprise Emulation Platform

Emulation is critical in the development of just about every complex IC these days, but most emulation systems are burdened with proprietary standards and form factors that don't scale well. In this episode of Chalk Talk, Amelia Dalton talks with Frank Schirrmeister of Cadence Design Systems about the new Palladium Z1 datacenter-class emulation system, which was designed with the capacity and scalability required for today's most challenging designs.

Analog to Digital Conversion

High-speed analog signals pose special challenges for analog to digital conversion (ADC). Applications like software-defined radio, radar, instrumentation, and high-speed wireless require ADC that is high-performance, high-accuracy, and low-power. In this episode of Chalk Talk, Amelia Dalton chats with Trent Butcher of Microchip Technology about solving the issues of high-speed ADC.

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FRAM Technology: The Next Generation of Non-volatile Memory for Microcontrollers

FRAM is one of the coolest non-volatile memory technologies to date. And, FRAM combined with microcontrollers is a perfect match. In this episode of Chalk Talk, Amelia Dalton chats with Will Cooper of Texas Instruments about the practical implications of FRAM technology in MCUs.

Vivado Design Suite HLx Editions

High-level design methods can dramatically increase your productivity. Now that technologies like high-level synthesis (HLS) have gone mainstream, we can make some serious improvements to our FPGA design process. In this episode of Chalk Talk, Amelia Dalton chats with Tim Vanevenhoven of Xilinx about how the new HLx editions of Vivado Design suite are taking high-level design mainstream.

High Voltage, Precision, Battery Stack Monitor

The LTC®6802 is a highly integrated multicell battery monitoring IC, capable of measuring up to 12 individual battery cell voltages. Using a novel serial data communication technique, multiple LTC6802s can be stacked in series without optocouplers or isolators, allowing precision voltage monitoring of every cell for 1000V+ systems. With high ESD, EMI and noise immunity, the LTC6802 stands up to real world conditions in a range of automotive and industrial applications.

Abstract and Conquer: A New Alternative to Hierarchical Timing Analysis Tech Packet

Delivering Higher FPGA Utilization & Performance: UltraScale Architecture

Ever notice how hard it can be to get the full utilization that an FPGA datasheet promises? Xilinx is aiming to change all that. In this episode of Chalk Talk, Amelia Dalton talks with Darren Zacher of Xilinx about the new Ultrascale FPGA family, and how the architecture has been optimized for maximum utilization.

USB Type-C Solutions

USB Type-C is coming, but how will you add it to your design? In this episode of Chalk Talk, Amelia Dalton chats with Gordon Hands of Lattice Semiconductor about a great new flexible solution for USB Type-C. Your job may be easier than you think.

Vivado In-System Debug

Today's complex FPGA designs can be challenging to debug. If you're debugging in hardware, you need both visibility and control of what's going on inside your chip. In this episode of Chalk Talk, Amelia Dalton talks to Ron Plyler of Xilinx about doing hardware debug in Xilinx's Vivado tool suite.

Enabling New Applications with NFC Connectivity and Energy Harvesting

In this episode of Chalk TalkHD Amelia chats with Greg Proehl (STMicroelectronics) about the basics of NFC technology, and they explore some interesting NFC applications as well as cool and innovative new NFC solutions from ST - including one with energy harvesting capability.

Function Enablement with 8-bit PIC Microcontrollers

For a lot of mainstream applications these days, 32-bit or even 16-bit processors are serious overkill. You can get great performance, smaller footprints, lower power consumption, and lower cost using 8-bit devices. In this episode of Chalk Talk, Amelia Dalton talks with Wayne Freeman of Microchip Technology about function enablement with 8-bit MCUs.

Vivado Design Suite: Integrated Design Environment

Software engineers have long depended on integrated design environments (IDEs) to help manage complex design processes. Now, hardware engineers can take advantage of the same complexity-taming level of integration. In this episode of Chalk Talk, Amelia Dalton explores the IDE in Vivado Design Suite with Brian Lay of Xilinx.

PADS VX: Redefining Productivity

When it comes to PCB Design, the giant companies don't get ALL the cool toys. Desktop design tools are now getting impressive capabilities that rival their enterprise-scale big brothers. In this episode of Chalk Talk, Amelia Dalton talks with Jim Martens of Mentor Graphics about the new PADS VX and the impressive capabilities it brings to desktop electronic design.

High-Reliability in FPGA Design - SEU Mitigation

Neutrons are coming for you and you'd better be prepared. Whether we like it or not, SEUs (Single Event Upsets) are becoming a bigger and bigger problem for our designs, especially for high realibility systems. If you thought SEUs couldn't mess up your next design because you aren't designing something destined for space, you need to think again. In this episode of Chalk TalkHD, I chat with Jeff Garrison of Synopsys about the how we can battle SEUs (on the ground or in the air) with the latest generation of design tools.

Stratus™ High-Level Synthesis

High-Level Synthesis (HLS) has been gaining traction in the mainstream for the past couple of years. But, HLS is good for a lot more than just increasing development productivity. In this episode of Chalk Talk, Amelia Dalton chats with David Pursley of Cadence Designs Systems about the new Stratus High-Level Synthesis technology, and how it will impact design productivity as well as the deployment and distribution of IP.

Bridging MIPI Technologies with ULD FPGAs

With mobile-based standards such as MIPI sweeping the design landscape, we will often find ourselves in the situation of needing to bridge between legacy interfaces and newer MIPI-based ones. In this episode of Chalk Talk, Amelia Dalton talks to Ted Marena of Lattice Semiconductor about using ultra-low-density FPGAs in mobile devices to enable us to get our other interfaces to play nicely with MIPI - with form-factors and power efficiency that are right at home in mobile devices.


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