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Physically Aware Synthesis Techniques to Lower Power, Improve Timing, Congestion & Correlation

Synthesis is the single most important step in creating a high-quality implementation of our design. But, we can't expect our synthesis tool to produce the best results without considering the very important effects of routing delay introduced by placement and routing. In this episode of Chalk Talk, Amelia Dalton talks with David Stratman of Cadence about how to apply physically-aware synthesis techniques to improve the overall quality of your design.

Announcing Indago Debug Platform

Debugging your design should be a lot more sophisticated than a bunch of "printf" statements. But that is exactly what many development teams end up using. In this episode of Chalk Talk, Amelia Dalton chats with Adam Sherer of Cadence Design Systems about the new Indago embedded debug system. It will change the way you think about debug.

Abstract and Conquer: A New Alternative to Hierarchical Timing Analysis

Sign-off timing analysis for today’s complex SoC designs can be daunting. Rather than just throwing more computer power at the problem, you need to adopt a hierarchical approach and take advantage of higher levels of abstraction. In this episode of Chalk Talk, Amelia Dalton talks with Ruben Molina of Cadence Design Systems about a new, faster approach to sign-off timing analysis.

FRAM Technology: The Next Generation of Non-volatile Memory for Microcontrollers

FRAM is one of the coolest non-volatile memory technologies to date. And, FRAM combined with microcontrollers is a perfect match. In this episode of Chalk Talk, Amelia Dalton chats with Will Cooper of Texas Instruments about the practical implications of FRAM technology in MCUs.

Stratus™ High-Level Synthesis

High-Level Synthesis (HLS) has been gaining traction in the mainstream for the past couple of years. But, HLS is good for a lot more than just increasing development productivity. In this episode of Chalk Talk, Amelia Dalton chats with David Pursley of Cadence Designs Systems about the new Stratus High-Level Synthesis technology, and how it will impact design productivity as well as the deployment and distribution of IP.

Function Enablement with 8-bit PIC Microcontrollers

For a lot of mainstream applications these days, 32-bit or even 16-bit processors are serious overkill. You can get great performance, smaller footprints, lower power consumption, and lower cost using 8-bit devices. In this episode of Chalk Talk, Amelia Dalton talks with Wayne Freeman of Microchip Technology about function enablement with 8-bit MCUs.

What is Electrically Aware Design?

For years, layout tools have focused on the pins and wires, the "froms" and "tos", the segments and nets - without considering that they were really creating a complex electrical circuit. Today, however, the electrical properties of our layout is critical, and issues like parasitic resistance and capacitance can have a dramatic effect on our final design. In this episode of Chalk Talk, Amelia Dalton chats with John Stabenow of Cadence about electrically-aware design with Cadence's Virtuoso.

PADS VX: Redefining Productivity

When it comes to PCB Design, the giant companies don't get ALL the cool toys. Desktop design tools are now getting impressive capabilities that rival their enterprise-scale big brothers. In this episode of Chalk Talk, Amelia Dalton talks with Jim Martens of Mentor Graphics about the new PADS VX and the impressive capabilities it brings to desktop electronic design.

The Vault

Professional engineering projects require professional working practices. When we're designing things to be manufactured in volume, it's critical that we keep track of versions and revisions, collaborate and communicate effectively, and hand-off the right materials to manufacturing. In this episode of Chalk Talk, Amelia Dalton chats with Sam Sattel of Altium about Altium's "Vault" - which makes those professional practices a whole lot easier and smoother.

Performance-per-Watt with FinFET-based All Programmable Architectures

Performance per watt is one of the most critical metrics for most system designers today. In the past, we could often focus on performance without thinking about power, but today's highly-constrained designs demand energy efficiency more than ever. In this episode of Chalk Talk, Amelia Dalton chats with Ehab Mohsen and Maureen Smerdon of Xilinx about optimizing your design for maximum performance per watt.

Meet PPA and Turnaround Time Requirements at Advanced Nodes with Innovus Implementation System

Today's complex IC designs demand a new generation of high-capacity, high-performance implementation tools. In this episode of Chalk Talk, Amelia Dalton chats Yufeng Luo of Cadence Design Systems about the incredible innovations in Cadence's new Innovus implementation suite.

Cadence Perspec System Verifier SW Driven SoC Verification Automation

To verify your next system design, you'll need a lot of use cases. But, creating, tracking, sharing, and running those use cases can be a nightmare. In this episode of Chalk Talk, Amelia Dalton chats with Larry Melling of Cadence Design Systems about the new Cadence Perspec System Verifier and how you can take advantage of its power and flexibility in your system-level design verification.

Accelerating Your Analog Output Design

Eventually, most of our designs need to control something in the real world. That means we have to bust out of our safe little digital realm, and drive some analog actuators or something similar. But, building that analog output section from scratch can be a real challenge. In this episode of Chalk Talk, Amelia Dalton talks to Bill Laumeister of Maxim Integrated about the Analog Output Design Accelerator Kit (MAXREFDES24EVSYS), a complete platform for easy evaluation that requires no lab equipment.

The Xilinx SDAccel Development Environment - Bringing The Best Performance/Watt to the Data Center

The new Xilinx SDAccel™ Development Environment gives data center application developers the complete FPGA-based hardware and software solution they want. SDAccel includes a fast, architecturally optimizing compiler that makes efficient use of on-chip FPGA resources; a familiar software-development flow with an Eclipse™-based Integrated Design Environment (IDE) for code development, profiling, and debugging, which provides a CPU/GPU-like work environment.

Mixed Signal Verification: The Long and Winding Road

Verification of your mixed-signal design can be a nightmare, with clashing disciplines and engineering cultures, and challenging use-case requirements. In this episode of Chalk Talk, Amelia Dalton chats with Steve Carlson of Cadence Design Systems about a comprehensive approach to mixed-signal system verification.

USB Type-C Solutions

USB Type-C is coming, but how will you add it to your design? In this episode of Chalk Talk, Amelia Dalton chats with Gordon Hands of Lattice Semiconductor about a great new flexible solution for USB Type-C. Your job may be easier than you think.

Inductance-to-Digital Converters Revolutionize Position & Rotation Sensing

Inductive sensing is a reliable, accurate, and robust technology for a wide variety of position, rotation, metal detection and spring compression measurement applications. In this episode of Chalk Talk, Amelia Dalton chats with Anjana Govil of Texas Instruments about how you can use inductance-to-digital converters to take advantage for inductive sensing in your next design.

MathWorks Connects to Hardware

The Maker movement is exploding right now, and most of the cool projects require doing some math. In this episode of Chalk Talk, Amelia Dalton chats with Amnon Gai of The MathWorks about using the powerful capabilities of MATLAB and Simulink in anything from your next maker hobby project to full-blown industrial designs.

Delivering Higher FPGA Utilization & Performance: UltraScale Architecture

Ever notice how hard it can be to get the full utilization that an FPGA datasheet promises? Xilinx is aiming to change all that. In this episode of Chalk Talk, Amelia Dalton talks with Darren Zacher of Xilinx about the new Ultrascale FPGA family, and how the architecture has been optimized for maximum utilization.

Zynq UltraScale+ MPSoC Overview

Building on the industry’s first All Programmable SoC, Xilinx is enabling a generation ahead of integration and intelligence with unprecedented levels of heterogeneous multi-processing system on chip and delivering 5X system-level performance per watt. By combining the right engines for the right tasks, Zynq® UltraScale+™ MPSoC provides a flexible, scalable processing platform with the highest levels of security and safety.

Massive DDR4 Memory Bandwidth with Xilinx UltraScale FPGAs

As FPGA designers, we are always looking for the maximum performance and flexibility in our designs. But, commodity DDR3 memory can be a bottleneck in many systems. In this episode of Chalk Talk, Amelia Dalton chats with Ehab Mohsen of Xilinx about the amazing performance you can get combining DDR4 with Xilinx FPGAs.

chalk talks

Accelerated Design Productivity with the Kintex-7 FPGA Display Kit

In this episode of Chalk TalkHD Amelia gets into the guts of display technology with Aaron Behman of Xilinx. From the newest standards to the details of 4K2K, we will tell you how FPGAs are uniquely capable of meeting the extreme performance and power challenges posed by current and emerging video standards.

Battery Management Solutions

Designing battery-powered systems can be challenging. In addition to power and form-factor considerations, today's batteries require sophisticated charging and monitoring for maximum safety, life, and performance. In this episode of Chalk Talk, Amelia Dalton chats with Richard DelRossi of Texas Instruments about battery management solutions that can dramatically simplify your next battery-powered design while adding important monitoring capabilities to your device.

10 Secrets to Getting a Lower BOM Cost

Reducing your BOM costs can be a complex challenge. If your design includes programmable logic, you have a lot of powerful options for reducing cost that might not be obvious simply by looking at component costs. In this episode of Chalk Talk, Amelia Dalton chats with Maureen Smerdon and Darren Zacher of Xilinx about minimizing BOM costs in your next design.

Power Supply Management in High-Availability Systems

One of the most basic (and most often overlooked) aspects of high-reliability system design is getting reliable power to all of our components. We need the right kind of power at the right places - at the right times, and in the right order. We need to handle power-up, power-down, and reset cases (among others). It can be really complicated. In this episode of Chalk TalkHD Amelia Dalton chats with Wendy Lockhart of Microsemi about how to handle power management for high-reliability systems.

Enabling New Applications with NFC Connectivity and Energy Harvesting

In this episode of Chalk TalkHD Amelia chats with Greg Proehl (STMicroelectronics) about the basics of NFC technology, and they explore some interesting NFC applications as well as cool and innovative new NFC solutions from ST - including one with energy harvesting capability.

Cadence Low Power Solution - RTL to GDSII Low Power Design

Low-power design used to be an afterthought. Today, however, we need to consider power throughout the entire design cycle - from RTL all the way through GDSII. And, we can have significant impact on overall power consumption with optimizations at just about every stage. In this episode of Chalk Talk, Amelia Dalton chats with Pete Hardee of Cadence about a holistic approach to low-power design.

Announcing the RN4677 Bluetooth 4.0 Dual Mode Module

Want to add plug-and-play Bluetooth to your design, but need to have 4.0 dual-mode? Now there is a solution that spans the gamut of Bluetooth technologies. In this episode of Chalk Talk, Amelia Dalton chats with Dave Richkas of Microchip about a new module that provides 4.0 dual-mode Bluetooth in a ready-to-use configuration.

Value of Power Modules

Today, the cool kids aren’t using discrete components for power anymore. Nope. They’re using power modules. In this episode of Chalk TalkHD Amelia chats with Rich Nowakowski and Kevin Beals (Texas Instruments) about power modules, and why they’re the best solution for a wide range of design projects.

latest papers and content

Announcing Indago Debug Platform

Debugging your design should be a lot more sophisticated than a bunch of "printf" statements. But that is exactly what many development teams end up using. In this episode of Chalk Talk, Amelia Dalton chats with Adam Sherer of Cadence Design Systems about the new Indago embedded debug system. It will change the way you think about debug.

Stratus™ High-Level Synthesis

High-Level Synthesis (HLS) has been gaining traction in the mainstream for the past couple of years. But, HLS is good for a lot more than just increasing development productivity. In this episode of Chalk Talk, Amelia Dalton chats with David Pursley of Cadence Designs Systems about the new Stratus High-Level Synthesis technology, and how it will impact design productivity as well as the deployment and distribution of IP.

Performance-per-Watt with FinFET-based All Programmable Architectures

Performance per watt is one of the most critical metrics for most system designers today. In the past, we could often focus on performance without thinking about power, but today's highly-constrained designs demand energy efficiency more than ever. In this episode of Chalk Talk, Amelia Dalton chats with Ehab Mohsen and Maureen Smerdon of Xilinx about optimizing your design for maximum performance per watt.

Top 10 Reasons Real Signal Integrity Engineers Demand Power-Aware SI Technology

Signal Integrity analysis that doesn't consider power effects can set you up for some dangerous problems. Ground bounce and other effects can cause problems that normal SI tools won't detect. In this episode of Chalk Talk, Amelia Dalton discusses power-aware signal integrity analysis with Brad Griffin of Cadence Design Systems. You'll want to watch to see what your SI tool may have been missing.

Altera Stratix 10 Security

Security is a key issue in just about every system design today. And, in FPGA-based systems you need robust security features built into the FPGA itself. In this episode of Chalk Talk, Amelia Dalton and Ryan Kenny of Altera discuss the new security features in Altera's Stratix 10 FPGAs and how they help you address even the most demanding security challenges.

10 Secrets to Getting a Lower BOM Cost

Reducing your BOM costs can be a complex challenge. If your design includes programmable logic, you have a lot of powerful options for reducing cost that might not be obvious simply by looking at component costs. In this episode of Chalk Talk, Amelia Dalton chats with Maureen Smerdon and Darren Zacher of Xilinx about minimizing BOM costs in your next design.

Announcing the RN4677 Bluetooth 4.0 Dual Mode Module

Want to add plug-and-play Bluetooth to your design, but need to have 4.0 dual-mode? Now there is a solution that spans the gamut of Bluetooth technologies. In this episode of Chalk Talk, Amelia Dalton chats with Dave Richkas of Microchip about a new module that provides 4.0 dual-mode Bluetooth in a ready-to-use configuration.

Meet PPA and Turnaround Time Requirements at Advanced Nodes with Innovus Implementation System

Today's complex IC designs demand a new generation of high-capacity, high-performance implementation tools. In this episode of Chalk Talk, Amelia Dalton chats Yufeng Luo of Cadence Design Systems about the incredible innovations in Cadence's new Innovus implementation suite.

Inductance-to-Digital Converters Revolutionize Position & Rotation Sensing

Inductive sensing is a reliable, accurate, and robust technology for a wide variety of position, rotation, metal detection and spring compression measurement applications. In this episode of Chalk Talk, Amelia Dalton chats with Anjana Govil of Texas Instruments about how you can use inductance-to-digital converters to take advantage for inductive sensing in your next design.

Connecting ZYNQ-7000 All Programmable SoCs with TE Connectivity Interconnect Products

New SoCs like the Xilinx Zynq are changing the industry - with new levels of functionality, flexibility, performance, and power efficiency. But, to take advantage of this new technology you'll need connectivity solutions that are up to the task. In this episode of Chalk Talk, Amelia Dalton chats with Mark Bell from TE Connectivity about plugs, connectors, antennas, and other connectivity solutions for today's most demanding designs.

Zynq-7000 All Programmable SoC: Embedded Design Tutorial

To help accelerate your Zynq®-7000 All Programmable SoC embedded development, Xilinx has introduced a new Embedded Design Tutorial, a hands-on guide designed to help walk you through embedded system design. The guide provides opportunities to work with tools under discussion, examples and an explanation of what is happening behind the scenes.

UltraFast Embedded Design Methodology Guide (REVISED)

Xilinx is building on the success of its UltraFast™ Design Methodology with the new UltraFast Embedded Design Methodology Guide. The new Guide enables embedded design teams to improve productivity with a documented methodology for the creation of smarter systems leveraging Zynq®-7000 All Programmable SoCs.

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more on demand

Mixed Signal Verification: The Long and Winding Road

Verification of your mixed-signal design can be a nightmare, with clashing disciplines and engineering cultures, and challenging use-case requirements. In this episode of Chalk Talk, Amelia Dalton chats with Steve Carlson of Cadence Design Systems about a comprehensive approach to mixed-signal system verification.

DO-254 for the FPGA Designer

The standard that governs the design of avionic components and systems, DO-254, is one of the most poorly understood but widely applicable standards in the avionic industry.

The Rise of Serial Memory and the Future of DDR

With no plans emerging to define a "DDR5" specification, the entire memory landscape is going to change over the coming years. Serial memory technologies like Hybrid Memory Cube (HMC) and other schemes still in the pipeline can be expected to fill the memory needs of the future. From the beginning, Xilinx has engineered its UltraScale™ devices and platforms with the future in mind, providing a seamless transition to these newly emerging serial memory technologies.

Memory Testing 101 – Avoid the Train Wreck

Memory is fundamental to the “sanity” of an embedded system. Inadequate memory testing is posing critical challenges to designers and indirectly manifesting considerable consequences at some of the biggest names in the electronics business. Today’s embedded systems consist of multiple memory types including SDRAM, LPDDR2, DDR3, FLASH, EEPROM and more, along with multiple protocols including GPIO, PCI, SPI and I2C. This paper will review a comprehensive and flexible Verification and Test Operating System (VTOS™) solution that includes a suite of memory tests that verifies the design for correctness and production readiness.

28 nm Characterization Lab Walk-Through

Liam Madden, Vice President of Silicon Technology takes you through the characterization lab at Xilinx discussing 28nm technology.

Avnet Zynq-7000 All Programmable SoC / AD9361 Software-Defined Radio Systems Development Kit

This video provides an introduction to the Zynq®-7000 All Programmable SoCs / AD9361 SDR System Development Kit. The kit provides a development platform that can be used to evaluate, prototype and accelerate the development of cognitive radio and wireless small cell applications on the Zynq-7000 family of devices and the ADI AD9361 RF Agile Transceiver. The Zynq family provides an ideal hardware solution for SDR applications that demand high performance, re-configurability and low power.

OpenCL on FPGAs: Accelerating Performance and Design Productivity

FPGAs have amazing capabilities when it comes to accelerating performance-critical algorithms at a tiny fraction of the power it would require to run them in software. The marriage of FPGAs with conventional CPUs could provide a truly remarkable high-performance computing platform. However, the problem has always been how to program it. In this episode of Chalk TalkHD Amelia chats with Albert Chang of Altera about about how OpenCL can now be used to program FPGAs. OpenCL is already very popular for programming systems with graphics processors (GPUs). Now, Altera has enabled us to use this same language to program FPGA+CPU systems.

Video Surveillance

In this video, Xilinx senior product line manager Joe Mallett shows how a mix of software and dedicated hardware in the Spartan allows an HD signal to be processed in real time, utilizing both VGA and QVGA formats.

First Xilinx Virtex-7 FPGA Demonstration

Watch demonstration of the second device in the Xilinx 28nm FPGA family -- the high performance Virtex-7 XV485T.

Xilinx FPGAs in Portable Ultrasound Systems

There has long been a need for portable ultrasound systems that have good resolution at affordable cost points. Portable systems enable health care providers to use ultrasound in remote locations such as disaster zones, developing regions, and battlefields, where it was not previously practical to do so.

Xilinx Automotive Spartan-6 FPGA Devices

Learn more about how the new line of automotive devices from Xilinx® can help advance next generation driver assistance, driver information, and driver infotainment applications. Presented by Thorsten Kistler, Automotive Marketing Manager, Europe.

I/O Design Flexibility with the FPGA Mezzanine Card (FMC)

The FPGA’s inherent flexibility has proven indispensable for the creation of external I/O interfaces. However, unless I/O is implemented on a daughter card (mezzanine module), replacing the physical I/O components and connectors requires changing the FPGA board design. To avoid these costs, designers have historically relied on the PCI™ Mezzanine Card (PMC) and Switched Mezzanine Card (XMC) standards. The problem is that these were developed years ago for general purpose solutions such as single-board computers— not FPGAs.

Altera Stratix 10 Security

Security is a key issue in just about every system design today. And, in FPGA-based systems you need robust security features built into the FPGA itself. In this episode of Chalk Talk, Amelia Dalton and Ryan Kenny of Altera discuss the new security features in Altera's Stratix 10 FPGAs and how they help you address even the most demanding security challenges.

How To Save 75% on Your Next ASIC Design

Do you think developing a custom mixed-signal chip for your application is beyond your team's reach? Too expensive, complicated, and risky? Think again! In this episode of Chalk TalkHD Amelia chats with Reid Wender of Triad Semiconductor about how you can dramatically reduce design costs and complexity - bringing that custom chip design within reach. In part one of our three-part Chalk TalkHD series, Amelia and Reid tell you how to save 75% on your design.

Wireless Base Station ZUC Block Cipher Implementation on Zynq SoCs

The Xilinx Zynq®-7000 All Programmable SoC provides a flexible platform that offers programmability for evolving technologies like LTE and new standards including, but not limited to, the ZUC algorithm. This white paper illustrates the advantages of the Zynq SoC-based design methodology using the Vivado® Design Suite, which facilitates an optimal hardware/software partitioning of the system functionality for better performance.

Zynq-7000 All Programmable SoCs Enabling Smarter Systems

The Xilinx Zynq®-7000 All Programmable SoC platform enables the efficient development of Smarter Systems through an optimal combination of two ARM Cortex™-A9 MPCore processors combined with Xilinx’s 28nm programmable-logic fabric. The Zynq-7000 platform also includes an extensive OS, middleware and stack ecosystem and offers the highest levels of security and reliably.


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