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Altera 2.5Gb Ethernet IP

Even though the newest, fastest standards get all the press, most of the work in the world is being done by standards like 2.5G Ethernet. In this episode of Chalk Talk, Amelia Dalton chats with Juwayriyah Hussain of Altera about Altera's IP for 2.5G Ethernet. It'll have you up and running with Ethernet on your next design in no time.

Analog to Digital Conversion

High speed analog signals pose special challenges for analog-to-digital conversion (ADC). Applications like software-defined radio, radar, instrumentation, and high-speed wireless require ADC that is high-performance, high-accuracy, and low power. In this episode of Chalk Talk, Amelia Dalton chats with Trent Butcher of Microchip Technology about solving the issues of high-speed ADC.

Announcing the RN4677 Bluetooth 4.0 Dual Mode Module

Want to add plug-and-play Bluetooth to your design, but need to have 4.0 dual-mode? Now there is a solution that spans the gamut of Bluetooth technologies. In this episode of Chalk Talk, Amelia Dalton chats with Dave Richkas of Microchip about a new module that provides 4.0 dual-mode Bluetooth in a ready-to-use configuration.

MathWorks Connects to Hardware

The Maker movement is exploding right now, and most of the cool projects require doing some math. In this episode of Chalk Talk, Amelia Dalton chats with Amnon Gai of The MathWorks about using the powerful capabilities of MATLAB and Simulink in anything from your next maker hobby project to full-blown industrial designs.

Connecting ZYNQ-7000 All Programmable SoCs with TE Connectivity Interconnect Products

New SoCs like the Xilinx Zynq are changing the industry - with new levels of functionality, flexibility, performance, and power efficiency. But, to take advantage of this new technology you'll need connectivity solutions that are up to the task. In this episode of Chalk Talk, Amelia Dalton chats with Mark Bell from TE Connectivity about plugs, connectors, antennas, and other connectivity solutions for today's most demanding designs.

Accelerating Your Analog Output Design

Eventually, most of our designs need to control something in the real world. That means we have to bust out of our safe little digital realm, and drive some analog actuators or something similar. But, building that analog output section from scratch can be a real challenge. In this episode of Chalk Talk, Amelia Dalton talks to Bill Laumeister of Maxim Integrated about the Analog Output Design Accelerator Kit (MAXREFDES24EVSYS), a complete platform for easy evaluation that requires no lab equipment.

Massive DDR4 Memory Bandwidth with Xilinx UltraScale FPGAs

As FPGA designers, we are always looking for the maximum performance and flexibility in our designs. But, commodity DDR3 memory can be a bottleneck in many systems. In this episode of Chalk Talk, Amelia Dalton chats with Ehab Mohsen of Xilinx about the amazing performance you can get combining DDR4 with Xilinx FPGAs.

Genus Synthesis Solution: Massively Parallel RTL Synthesis

Synthesis of large designs can be a major bottleneck, particularly with the number of iterations often required and the long synthesis runtimes of current generation tools. In this episode of Chalk Talk, Amelia Dalton chats with David Stratman of Cadence Design Systems about the revolutionary new Genus massively-parallel synthesis technology. Genus promises to have an enormous impact on the synthesis bottleneck.

Meet ARTY: the $99 FPGA Development Kit from Xilinx

Have you been wanting to try FPGA design? Were FPGA development boards and tools always too expensive and difficult to use? In this episode of Chalk Talk, Amelia Dalton chats with Darren Zacher and Jim Burnham of Xilinx about ARTY, a new, easy-to-use $99 FPGA-based embedded development kit from Xilinx.

Model-Based Design for Xilinx Zynq & Altera SoC Devices

You'll get way more out of your Xilinx Zynq or Altera SoC device if you have a smooth design flow from MATLAB and Simulink. Luckily, MathWorks has already thought of that. In this episode of Chalk Talk, Amelia Dalton chats with Eric Cigan of MathWorks about Model-Based Design for this new powerful class of programmable devices.

Architecture Matters: Three Architectural Insights for SoC FPGAs

New devices that combine the power and flexiblility of FPGAs and conventional processors on a single chip represent a breakthrough in capability. But, understanding the complex architecture of these sophisticated components requires us to look under the hood to see how the architecture fits our design requirements, and how to choose the right chip for our application. In this episode of Chalk Talk, Amelia Dalton talks with Todd Koelling of Altera about what to look for in the architecture of your SoC FPGA.

Introducing Palladium Z1 Enterprise Emulation Platform

Emulation is critical in the development of just about every complex IC these days, but most emulation systems are burdened with proprietary standards and form factors that don't scale well. In this episode of Chalk Talk, Amelia Dalton talks with Frank Schirrmeister of Cadence Design Systems about the new Palladium Z1 datacenter-class emulation system, which was designed with the capacity and scalability required for today's most challenging designs.

i.MX 6SoloX – Freescale’s New Heterogeneous Multicore Applications Processor

Many applications today need both an applications processor AND a real-time MCU. But, most solutions don't offer both on the same chip. In this episode of Chalk Talk, Amelia Dalton chats with Amanda McGregor of Freescale about a new application processor that combines an ARM Cortex-A9 core with the efficiency and real-time capability of the Cortex-M4.

Meet PPA and Turnaround Time Requirements at Advanced Nodes with Innovus Implementation System

Today's complex IC designs demand a new generation of high-capacity, high-performance implementation tools. In this episode of Chalk Talk, Amelia Dalton chats Yufeng Luo of Cadence Design Systems about the incredible innovations in Cadence's new Innovus implementation suite.

Cadence Perspec System Verifier SW Driven SoC Verification Automation

To verify your next system design, you'll need a lot of use cases. But, creating, tracking, sharing, and running those use cases can be a nightmare. In this episode of Chalk Talk, Amelia Dalton chats with Larry Melling of Cadence Design Systems about the new Cadence Perspec System Verifier and how you can take advantage of its power and flexibility in your system-level design verification.

Stratus™ High-Level Synthesis

High-Level Synthesis (HLS) has been gaining traction in the mainstream for the past couple of years. But, HLS is good for a lot more than just increasing development productivity. In this episode of Chalk Talk, Amelia Dalton chats with David Pursley of Cadence Designs Systems about the new Stratus High-Level Synthesis technology, and how it will impact design productivity as well as the deployment and distribution of IP.

Cadence Tensilica Vision P5

Intelligent vision systems represent some of today's biggest embedded design challenges. The enormous processing power required combined with small energy budgets rules out most conventional applications processors. In this episode of Chalk Talk, Amelia Dalton chats with Dennis Crespo from Cadence Design Systems about the new Tensilica Vision P5 processors - designed specifically to meet the needs of embedded vision applications.

Performance-per-Watt with FinFET-based All Programmable Architectures

Performance per watt is one of the most critical metrics for most system designers today. In the past, we could often focus on performance without thinking about power, but today's highly-constrained designs demand energy efficiency more than ever. In this episode of Chalk Talk, Amelia Dalton chats with Ehab Mohsen and Maureen Smerdon of Xilinx about optimizing your design for maximum performance per watt.

10 Secrets to Getting a Lower BOM Cost

Reducing your BOM costs can be a complex challenge. If your design includes programmable logic, you have a lot of powerful options for reducing cost that might not be obvious simply by looking at component costs. In this episode of Chalk Talk, Amelia Dalton chats with Maureen Smerdon and Darren Zacher of Xilinx about minimizing BOM costs in your next design.

USB Type-C Solutions

USB Type-C is coming, but how will you add it to your design? In this episode of Chalk Talk, Amelia Dalton chats with Gordon Hands of Lattice Semiconductor about a great new flexible solution for USB Type-C. Your job may be easier than you think.

M8/M12 Connector System

For industrial-grade applications, consumer-style connectors just don't cut it. You'd never use RJ45 where you really care about ruggedness or reliability. In this episode of Chalk Talk, Amelia Dalton chats with Tom Wess of TE Connectivity about M8 and M12 high-reliability connectivity solutions that will keep your system operating smoothly under harsh conditions.

chalk talks

Integrating Electronic Design Analysis Upstream, Downstream, and Sideways

PCB Design demands a great deal more care these days. Signal and power integrity are just some of the realities that board designers must contend with these days. In this episode of Chalk Talk, Amelia Dalton talks with Brad Griffin of Cadence Design Systems about the integration of these important analysis capabilities into the PCB design process.

Infineon's 8th Generation of RF Transistors Maximize Receiver Sensitivity and Range

If you're designing systems that use the latest WiFi standards, you know that a great RF transistor with high gain and low noise is key to good performance. In this episode of Chalk Talk, Amelia Dalton talks with Andrew Nelson of Infineon about the latest in high-performance RF transistors - Infineon's new 8th generation.

Cadence Low Power Solution - RTL to GDSII Low Power Design

Low-power design used to be an afterthought. Today, however, we need to consider power throughout the entire design cycle - from RTL all the way through GDSII. And, we can have significant impact on overall power consumption with optimizations at just about every stage. In this episode of Chalk Talk, Amelia Dalton chats with Pete Hardee of Cadence about a holistic approach to low-power design.

Timing Closure in FPGA Designs Made Easy with PlanAhead

In this episode of Chalk TalkHD Amelia chats with Frederic Rivoallon of Xilinx and they attempt to unravel the mysteries of timing closure and reveal that yes, you can get timing closure right the first time in your next design.

World's Smallest FPGAs Solve 4 Big Problems

In this episode of Chalk Talk, Amelia chats with Gordon Hands (Lattice Semiconductor) about some awesomely tiny FPGAs that bring the power of programmable logic into devices like cell phones, tablets, and other power and form factor sensitive applications.

Genus Synthesis Solution: Massively Parallel RTL Synthesis

Synthesis of large designs can be a major bottleneck, particularly with the number of iterations often required and the long synthesis runtimes of current generation tools. In this episode of Chalk Talk, Amelia Dalton chats with David Stratman of Cadence Design Systems about the revolutionary new Genus massively-parallel synthesis technology. Genus promises to have an enormous impact on the synthesis bottleneck.

Product-Centric Design with Virtual Prototyping

As engineers, it's easy to get the feeling that your PCB is the center of the design universe. But, it's important to remember that we are designing products, not just boards, and a product-centric design methodology is essential to creating the competitive products that customers demand. Product level virtual prototyping validates that your detailed design approach can support the product requirements. In this episode of Chalk Talk, Amelia Dalton and Bob Potock explore the concept of product-centric design with virtual prototyping and highlight how it differs from traditional, PCB-centric design.

Battery Management Solutions

Designing battery-powered systems can be challenging. In addition to power and form-factor considerations, today's batteries require sophisticated charging and monitoring for maximum safety, life, and performance. In this episode of Chalk Talk, Amelia Dalton chats with Richard DelRossi of Texas Instruments about battery management solutions that can dramatically simplify your next battery-powered design while adding important monitoring capabilities to your device.

latest papers and content

Cadence Tensilica Vision P5

Intelligent vision systems represent some of today's biggest embedded design challenges. The enormous processing power required combined with small energy budgets rules out most conventional applications processors. In this episode of Chalk Talk, Amelia Dalton chats with Dennis Crespo from Cadence Design Systems about the new Tensilica Vision P5 processors - designed specifically to meet the needs of embedded vision applications.

Introducing Palladium Z1 Enterprise Emulation Platform

Emulation is critical in the development of just about every complex IC these days, but most emulation systems are burdened with proprietary standards and form factors that don't scale well. In this episode of Chalk Talk, Amelia Dalton talks with Frank Schirrmeister of Cadence Design Systems about the new Palladium Z1 datacenter-class emulation system, which was designed with the capacity and scalability required for today's most challenging designs.

Analog to Digital Conversion

High speed analog signals pose special challenges for analog-to-digital conversion (ADC). Applications like software-defined radio, radar, instrumentation, and high-speed wireless require ADC that is high-performance, high-accuracy, and low power. In this episode of Chalk Talk, Amelia Dalton chats with Trent Butcher of Microchip Technology about solving the issues of high-speed ADC.

M8/M12 Connector System

For industrial-grade applications, consumer-style connectors just don't cut it. You'd never use RJ45 where you really care about ruggedness or reliability. In this episode of Chalk Talk, Amelia Dalton chats with Tom Wess of TE Connectivity about M8 and M12 high-reliability connectivity solutions that will keep your system operating smoothly under harsh conditions.

Altera 2.5Gb Ethernet IP

Even though the newest, fastest standards get all the press, most of the work in the world is being done by standards like 2.5G Ethernet. In this episode of Chalk Talk, Amelia Dalton chats with Juwayriyah Hussain of Altera about Altera's IP for 2.5G Ethernet. It'll have you up and running with Ethernet on your next design in no time.

MatrixCam Video Development Kit from ON Semiconductor

Cameras are an important part of many IoT projects these days, but developing a camera subsystem from scratch is a complex and demanding engineering task. In this episode of Chalk Talk, Amelia Dalton talks with Radhika Arora from ON Semiconductor about MatrixCam - a new development kit that will have your camera-based project up and running in no time.

Meet ARTY: the $99 FPGA Development Kit from Xilinx

Have you been wanting to try FPGA design? Were FPGA development boards and tools always too expensive and difficult to use? In this episode of Chalk Talk, Amelia Dalton chats with Darren Zacher and Jim Burnham of Xilinx about ARTY, a new, easy-to-use $99 FPGA-based embedded development kit from Xilinx.

Tensilica Fusion DSP for IoT, Wearables, Communications

IoT and wearable designs often require big DSP processing power on a tiny energy budget. But, conventional processors are not well suited to these kinds of applications. In this episode of Chalk Talk, Amelia Dalton talks with Chris Rowen of Cadence Design Systems about Tensilica customized DSP processors that are ideally suited for these demanding IoT tasks.

Genus Synthesis Solution: Massively Parallel RTL Synthesis

Synthesis of large designs can be a major bottleneck, particularly with the number of iterations often required and the long synthesis runtimes of current generation tools. In this episode of Chalk Talk, Amelia Dalton chats with David Stratman of Cadence Design Systems about the revolutionary new Genus massively-parallel synthesis technology. Genus promises to have an enormous impact on the synthesis bottleneck.

Announcing Indago Debug Platform

Debugging your design should be a lot more sophisticated than a bunch of "printf" statements. But that is exactly what many development teams end up using. In this episode of Chalk Talk, Amelia Dalton chats with Adam Sherer of Cadence Design Systems about the new Indago embedded debug system. It will change the way you think about debug.

Stratus™ High-Level Synthesis

High-Level Synthesis (HLS) has been gaining traction in the mainstream for the past couple of years. But, HLS is good for a lot more than just increasing development productivity. In this episode of Chalk Talk, Amelia Dalton chats with David Pursley of Cadence Designs Systems about the new Stratus High-Level Synthesis technology, and how it will impact design productivity as well as the deployment and distribution of IP.

Performance-per-Watt with FinFET-based All Programmable Architectures

Performance per watt is one of the most critical metrics for most system designers today. In the past, we could often focus on performance without thinking about power, but today's highly-constrained designs demand energy efficiency more than ever. In this episode of Chalk Talk, Amelia Dalton chats with Ehab Mohsen and Maureen Smerdon of Xilinx about optimizing your design for maximum performance per watt.

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Integrated Power and System Management

In this episode of Chalk TalkHD Amelia chats with Shyam Chandra of Lattice Semiconductor about an integrated approach to system and power management that will lighten your design load, improve your overall system design, and probably lower your total cost at the same time.

Physically Aware Synthesis Techniques to Lower Power, Improve Timing, Congestion & Correlation

Synthesis is the single most important step in creating a high-quality implementation of our design. But, we can't expect our synthesis tool to produce the best results without considering the very important effects of routing delay introduced by placement and routing. In this episode of Chalk Talk, Amelia Dalton talks with David Stratman of Cadence about how to apply physically-aware synthesis techniques to improve the overall quality of your design.

It's 2022: Do You Know What Your FPGA Is?

Does the definition of "FPGA" seem like a moving target? Over the past few years, there has been phenomenal progress in FPGA technology - going from simple glue logic to impressive programmable systems-on-chip. Today's FPGAs are some of the most powerful and flexible devices ever built. But, what will your FPGA look like ten years from now? In this episode of Chalk TalkHD Amelia Dalton chats with Umar Mughal of Altera about the past, present, and future of this exciting technology.

Scalable Smart Debugging With ZeBu-Server

In this episode of Chalk TalkHD, Amelia chats with Lauro Rizzatti of EVE about how EVE's ZeBu emulation technology can help you find that one last bug in even the biggest of designs.

Timing Closure in FPGA Designs Made Easy with PlanAhead

In this episode of Chalk TalkHD Amelia chats with Frederic Rivoallon of Xilinx and they attempt to unravel the mysteries of timing closure and reveal that yes, you can get timing closure right the first time in your next design.

Altera 2.5Gb Ethernet IP

Even though the newest, fastest standards get all the press, most of the work in the world is being done by standards like 2.5G Ethernet. In this episode of Chalk Talk, Amelia Dalton chats with Juwayriyah Hussain of Altera about Altera's IP for 2.5G Ethernet. It'll have you up and running with Ethernet on your next design in no time.

Debugging Machine Check Exceptions on Embedded IA Platforms

Embedded systems must be able to detect, recover from and report errors. This is a critical feature during debugging and also for quality control after product manufacturing has commenced. Advanced error handling is especially important for embedded systems. This white paper presents a step-by-step approach to debugging machine check exceptions and understanding their causes are resolving errors in embedded Intel® architecture platforms.

It's the Software, Silly! - Success with FPGA-based Prototyping

Software is becoming a larger and larger part of our system-on-chip (SoC) designs. It is critical that we be able to begin developing and debugging software as early as possible in the design cycle. But, the hardware part of today's complex designs takes months to stabilize. In this episode of Chalk Talk, Amelia Dalton talks with Juergen Jaeger of Cadence about the tight relationship between software and emulation and how you can achieve success in your SoC design with a comprehensive emulation strategy.

100G Ethernet Packet Parsing with Spacetime

Designing 100G Ethernet is a daunting challenge. Timing, power, latency, and throughput all fight with each other, and it's easy to fall into a design trap with a solution that doesn't offer a good compromise. In this episode of Chalk Talk, Amelia Dalton chats with Parsun Raha about the challenges of 100G (and beyond), and how those conflicting design goals can be met by Tabula's innovative Spacetime architecture.

Smart, Scalable Debugging with ZeBu

Modern SOC realization requires a development effort beyond that of traditional hardware verification. Creating a complete application-ready SOC platform now includes pre-tapeout software validation and hardware/software co-verification using full-chip RTL models. These billion-cycle scenarios are often beyond the scope of HDL simulation, but are ideal for emulation using EVE’s ZeBu hardware-assisted verification platforms.

Memory Testing 101 – Avoid the Train Wreck

Memory is fundamental to the “sanity” of an embedded system. Inadequate memory testing is posing critical challenges to designers and indirectly manifesting considerable consequences at some of the biggest names in the electronics business. Today’s embedded systems consist of multiple memory types including SDRAM, LPDDR2, DDR3, FLASH, EEPROM and more, along with multiple protocols including GPIO, PCI, SPI and I2C. This paper will review a comprehensive and flexible Verification and Test Operating System (VTOS™) solution that includes a suite of memory tests that verifies the design for correctness and production readiness.

Simplifying Industrial Ethernet Design

In this episode of Chalk TalkHD Amelia chats with Suhel Dhanani of Altera about the who, what, and how of industrial ethernet design.

Integrated Design Environment for FPGA

Do you find that FPGA design flows can get a bit confusing and difficult to manage? What we really need is an integrated design environment that will help us keep our design activities organized. In this episode of Chalk TalkHD Amelia chats with Satyam Jani from Aldec about integrated design environments (IDEs) for FPGA design, why FPGA designers need a vendor-independent IDE, and how an FPGA-centric IDE can help us get through our design flow quite a bit more easily.

Effective Version Control for Electronic Design

When it comes to our hardware engineering projects, we need to keep our design data well organized. In the software world, this is accomplished with the help of version control systems. Unfortunately, most of us don’t learn version control for hardware design. In this episode of Chalk TalkHD Amelia chats with Ben Jordan of Altium about how effective version control can help every step of the design process, enable team design, manage versions and configurations, and keep our project from spiraling out of control.

M8/M12 Connector System

For industrial-grade applications, consumer-style connectors just don't cut it. You'd never use RJ45 where you really care about ruggedness or reliability. In this episode of Chalk Talk, Amelia Dalton chats with Tom Wess of TE Connectivity about M8 and M12 high-reliability connectivity solutions that will keep your system operating smoothly under harsh conditions.

Architecture Matters: Three Architectural Insights for SoC FPGAs

New devices that combine the power and flexiblility of FPGAs and conventional processors on a single chip represent a breakthrough in capability. But, understanding the complex architecture of these sophisticated components requires us to look under the hood to see how the architecture fits our design requirements, and how to choose the right chip for our application. In this episode of Chalk Talk, Amelia Dalton talks with Todd Koelling of Altera about what to look for in the architecture of your SoC FPGA.

High Voltage, Precision, Battery Stack Monitor

The LTC®6802 is a highly integrated multicell battery monitoring IC, capable of measuring up to 12 individual battery cell voltages. Using a novel serial data communication technique, multiple LTC6802s can be stacked in series without optocouplers or isolators, allowing precision voltage monitoring of every cell for 1000V+ systems. With high ESD, EMI and noise immunity, the LTC6802 stands up to real world conditions in a range of automotive and industrial applications.


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