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Announcing Indago Debug Platform

Debugging your design should be a lot more sophisticated than a bunch of "printf" statements. But that is exactly what many development teams end up using. In this episode of Chalk Talk, Amelia Dalton chats with Adam Sherer of Cadence Design Systems about the new Indago embedded debug system. It will change the way you think about debug.

Efficient Product Creation with Allegro and Sigrity Solutions

Being a PCB Expert isn't enough anymore. With today's interconnected systems, you need to design at the product level to be competitive. In this episode of Chalk Talk, Amelia Dalton chats with Hemant Shah of Cadence Design Systems about product design with Cadence's Allegro and Sigrity tools.

Stratus™ High-Level Synthesis

High-Level Synthesis (HLS) has been gaining traction in the mainstream for the past couple of years. But, HLS is good for a lot more than just increasing development productivity. In this episode of Chalk Talk, Amelia Dalton chats with David Pursley of Cadence Designs Systems about the new Stratus High-Level Synthesis technology, and how it will impact design productivity as well as the deployment and distribution of IP.

i.MX 6SoloX – Freescale’s New Heterogeneous Multicore Applications Processor

Many applications today need both an applications processor AND a real-time MCU. But, most solutions don't offer both on the same chip. In this episode of Chalk Talk, Amelia Dalton chats with Amanda McGregor of Freescale about a new application processor that combines an ARM Cortex-A9 core with the efficiency and real-time capability of the Cortex-M4.

Performance-per-Watt with FinFET-based All Programmable Architectures

Performance per watt is one of the most critical metrics for most system designers today. In the past, we could often focus on performance without thinking about power, but today's highly-constrained designs demand energy efficiency more than ever. In this episode of Chalk Talk, Amelia Dalton chats with Ehab Mohsen and Maureen Smerdon of Xilinx about optimizing your design for maximum performance per watt.

MathWorks Connects to Hardware

The Maker movement is exploding right now, and most of the cool projects require doing some math. In this episode of Chalk Talk, Amelia Dalton chats with Amnon Gai of The MathWorks about using the powerful capabilities of MATLAB and Simulink in anything from your next maker hobby project to full-blown industrial designs.

Model-Based Design for Xilinx Zynq & Altera SoC Devices

You'll get way more out of your Xilinx Zynq or Altera SoC device if you have a smooth design flow from MATLAB and Simulink. Luckily, MathWorks has already thought of that. In this episode of Chalk Talk, Amelia Dalton chats with Eric Cigan of MathWorks about Model-Based Design for this new powerful class of programmable devices.

Solution for Heterogeneous Multicore Embedded Systems

Designing software for heterogeneous multicore embedded systems is a daunting challenge. Each of those words "heterogeneous", "Multicore", and "embedded" represents something that can cause a major breakdown in the normal software development flow. In this episode of Chalk Talk, Amelia Dalton chats with Felix Baum of Mentor Graphics about challenges and solutions for heterogeneous multicore embedded design.

Cadence Perspec System Verifier SW Driven SoC Verification Automation

To verify your next system design, you'll need a lot of use cases. But, creating, tracking, sharing, and running those use cases can be a nightmare. In this episode of Chalk Talk, Amelia Dalton chats with Larry Melling of Cadence Design Systems about the new Cadence Perspec System Verifier and how you can take advantage of its power and flexibility in your system-level design verification.

Cadence Tensilica Vision P5

Intelligent vision systems represent some of today's biggest embedded design challenges. The enormous processing power required combined with small energy budgets rules out most conventional applications processors. In this episode of Chalk Talk, Amelia Dalton chats with Dennis Crespo from Cadence Design Systems about the new Tensilica Vision P5 processors - designed specifically to meet the needs of embedded vision applications.

Massive DDR4 Memory Bandwidth with Xilinx UltraScale FPGAs

As FPGA designers, we are always looking for the maximum performance and flexibility in our designs. But, commodity DDR3 memory can be a bottleneck in many systems. In this episode of Chalk Talk, Amelia Dalton chats with Ehab Mohsen of Xilinx about the amazing performance you can get combining DDR4 with Xilinx FPGAs.

Announcing the RN4677 Bluetooth 4.0 Dual Mode Module

Want to add plug-and-play Bluetooth to your design, but need to have 4.0 dual-mode? Now there is a solution that spans the gamut of Bluetooth technologies. In this episode of Chalk Talk, Amelia Dalton chats with Dave Richkas of Microchip about a new module that provides 4.0 dual-mode Bluetooth in a ready-to-use configuration.

MatrixCam Video Development Kit from ON Semiconductor

Cameras are an important part of many IoT projects these days, but developing a camera subsystem from scratch is a complex and demanding engineering task. In this episode of Chalk Talk, Amelia Dalton talks with Radhika Arora from ON Semiconductor about MatrixCam - a new development kit that will have your camera-based project up and running in no time.

Accelerating Your Analog Output Design

Eventually, most of our designs need to control something in the real world. That means we have to bust out of our safe little digital realm, and drive some analog actuators or something similar. But, building that analog output section from scratch can be a real challenge. In this episode of Chalk Talk, Amelia Dalton talks to Bill Laumeister of Maxim Integrated about the Analog Output Design Accelerator Kit (MAXREFDES24EVSYS), a complete platform for easy evaluation that requires no lab equipment.

USB Type-C Solutions

USB Type-C is coming, but how will you add it to your design? In this episode of Chalk Talk, Amelia Dalton chats with Gordon Hands of Lattice Semiconductor about a great new flexible solution for USB Type-C. Your job may be easier than you think.

Genus Synthesis Solution: Massively Parallel RTL Synthesis

Synthesis of large designs can be a major bottleneck, particularly with the number of iterations often required and the long synthesis runtimes of current generation tools. In this episode of Chalk Talk, Amelia Dalton chats with David Stratman of Cadence Design Systems about the revolutionary new Genus massively-parallel synthesis technology. Genus promises to have an enormous impact on the synthesis bottleneck.

M8/M12 Connector System

For industrial-grade applications, consumer-style connectors just don't cut it. You'd never use RJ45 where you really care about ruggedness or reliability. In this episode of Chalk Talk, Amelia Dalton chats with Tom Wess of TE Connectivity about M8 and M12 high-reliability connectivity solutions that will keep your system operating smoothly under harsh conditions.

Connecting ZYNQ-7000 All Programmable SoCs with TE Connectivity Interconnect Products

New SoCs like the Xilinx Zynq are changing the industry - with new levels of functionality, flexibility, performance, and power efficiency. But, to take advantage of this new technology you'll need connectivity solutions that are up to the task. In this episode of Chalk Talk, Amelia Dalton chats with Mark Bell from TE Connectivity about plugs, connectors, antennas, and other connectivity solutions for today's most demanding designs.

Architecture Matters: Three Architectural Insights for SoC FPGAs

New devices that combine the power and flexiblility of FPGAs and conventional processors on a single chip represent a breakthrough in capability. But, understanding the complex architecture of these sophisticated components requires us to look under the hood to see how the architecture fits our design requirements, and how to choose the right chip for our application. In this episode of Chalk Talk, Amelia Dalton talks with Todd Koelling of Altera about what to look for in the architecture of your SoC FPGA.

Meet ARTY: the $99 FPGA Development Kit from Xilinx

Have you been wanting to try FPGA design? Were FPGA development boards and tools always too expensive and difficult to use? In this episode of Chalk Talk, Amelia Dalton chats with Darren Zacher and Jim Burnham of Xilinx about ARTY, a new, easy-to-use $99 FPGA-based embedded development kit from Xilinx.

10 Secrets to Getting a Lower BOM Cost

Reducing your BOM costs can be a complex challenge. If your design includes programmable logic, you have a lot of powerful options for reducing cost that might not be obvious simply by looking at component costs. In this episode of Chalk Talk, Amelia Dalton chats with Maureen Smerdon and Darren Zacher of Xilinx about minimizing BOM costs in your next design.

chalk talks

Cadence Perspec System Verifier SW Driven SoC Verification Automation

To verify your next system design, you'll need a lot of use cases. But, creating, tracking, sharing, and running those use cases can be a nightmare. In this episode of Chalk Talk, Amelia Dalton chats with Larry Melling of Cadence Design Systems about the new Cadence Perspec System Verifier and how you can take advantage of its power and flexibility in your system-level design verification.

Vivado Design Suite: Integrated Design Environment

Software engineers have long depended on integrated design environments (IDEs) to help manage complex design processes. Now, hardware engineers can take advantage of the same complexity-taming level of integration. In this episode of Chalk Talk, Amelia Dalton explores the IDE in Vivado Design Suite with Brian Lay of Xilinx.

High-Reliability in FPGA Design - SEU Mitigation

Neutrons are coming for you and you'd better be prepared. Whether we like it or not, SEUs (Single Event Upsets) are becoming a bigger and bigger problem for our designs, especially for high realibility systems. If you thought SEUs couldn't mess up your next design because you aren't designing something destined for space, you need to think again. In this episode of Chalk TalkHD, I chat with Jeff Garrison of Synopsys about the how we can battle SEUs (on the ground or in the air) with the latest generation of design tools.

IP and Process Solutions for Energy-efficient PMICs

In this episode of Chalk TalkHD Amelia chats with Ravi Mahatme from ARM and King Ou from GLOBALFOUNDRIES about how IP and process solutions can help solve our power management problems.

Battery Management Solutions

Designing battery-powered systems can be challenging. In addition to power and form-factor considerations, today's batteries require sophisticated charging and monitoring for maximum safety, life, and performance. In this episode of Chalk Talk, Amelia Dalton chats with Richard DelRossi of Texas Instruments about battery management solutions that can dramatically simplify your next battery-powered design while adding important monitoring capabilities to your device.

Cadence Tempus Timing Signoff Solution

Achieving timing closure for signoff can be a daunting challenge in today's complex designs. Meeting timing under all conditions - with the certainty required for signoff - is a complex and demanding task. In this episode of Chalk Talk, Amelia Dalton talks to Ruben Molina of Cadence Design Systems about the special challenges of signoff timing closure, and Cadence's new Tempus timing analysis tool.

Smartphone and Tablet Accessory Design

In this episode of Chalk TalkHD Amelia Dalton talks to David Flowers from Microchip about creating tablet and smartphone accessories - and how it just may be easier than you think...

Adding Wi-Fi to Your FPGA Design - Building a Connected Device

In the first episode of our new Chalk TalkHD series, Amelia Dalton talks to Bob Potock from Altium as they add Wi-Fi to an FPGA-based embedded system.

latest papers and content

Cadence Tensilica Vision P5

Intelligent vision systems represent some of today's biggest embedded design challenges. The enormous processing power required combined with small energy budgets rules out most conventional applications processors. In this episode of Chalk Talk, Amelia Dalton chats with Dennis Crespo from Cadence Design Systems about the new Tensilica Vision P5 processors - designed specifically to meet the needs of embedded vision applications.

Introducing Palladium Z1 Enterprise Emulation Platform

Emulation is critical in the development of just about every complex IC these days, but most emulation systems are burdened with proprietary standards and form factors that don't scale well. In this episode of Chalk Talk, Amelia Dalton talks with Frank Schirrmeister of Cadence Design Systems about the new Palladium Z1 datacenter-class emulation system, which was designed with the capacity and scalability required for today's most challenging designs.

Analog to Digital Conversion

High speed analog signals pose special challenges for analog-to-digital conversion (ADC). Applications like software-defined radio, radar, instrumentation, and high-speed wireless require ADC that is high-performance, high-accuracy, and low power. In this episode of Chalk Talk, Amelia Dalton chats with Trent Butcher of Microchip Technology about solving the issues of high-speed ADC.

M8/M12 Connector System

For industrial-grade applications, consumer-style connectors just don't cut it. You'd never use RJ45 where you really care about ruggedness or reliability. In this episode of Chalk Talk, Amelia Dalton chats with Tom Wess of TE Connectivity about M8 and M12 high-reliability connectivity solutions that will keep your system operating smoothly under harsh conditions.

Altera 2.5Gb Ethernet IP

Even though the newest, fastest standards get all the press, most of the work in the world is being done by standards like 2.5G Ethernet. In this episode of Chalk Talk, Amelia Dalton chats with Juwayriyah Hussain of Altera about Altera's IP for 2.5G Ethernet. It'll have you up and running with Ethernet on your next design in no time.

MatrixCam Video Development Kit from ON Semiconductor

Cameras are an important part of many IoT projects these days, but developing a camera subsystem from scratch is a complex and demanding engineering task. In this episode of Chalk Talk, Amelia Dalton talks with Radhika Arora from ON Semiconductor about MatrixCam - a new development kit that will have your camera-based project up and running in no time.

Meet ARTY: the $99 FPGA Development Kit from Xilinx

Have you been wanting to try FPGA design? Were FPGA development boards and tools always too expensive and difficult to use? In this episode of Chalk Talk, Amelia Dalton chats with Darren Zacher and Jim Burnham of Xilinx about ARTY, a new, easy-to-use $99 FPGA-based embedded development kit from Xilinx.

Tensilica Fusion DSP for IoT, Wearables, Communications

IoT and wearable designs often require big DSP processing power on a tiny energy budget. But, conventional processors are not well suited to these kinds of applications. In this episode of Chalk Talk, Amelia Dalton talks with Chris Rowen of Cadence Design Systems about Tensilica customized DSP processors that are ideally suited for these demanding IoT tasks.

Genus Synthesis Solution: Massively Parallel RTL Synthesis

Synthesis of large designs can be a major bottleneck, particularly with the number of iterations often required and the long synthesis runtimes of current generation tools. In this episode of Chalk Talk, Amelia Dalton chats with David Stratman of Cadence Design Systems about the revolutionary new Genus massively-parallel synthesis technology. Genus promises to have an enormous impact on the synthesis bottleneck.

Announcing Indago Debug Platform

Debugging your design should be a lot more sophisticated than a bunch of "printf" statements. But that is exactly what many development teams end up using. In this episode of Chalk Talk, Amelia Dalton chats with Adam Sherer of Cadence Design Systems about the new Indago embedded debug system. It will change the way you think about debug.

Stratus™ High-Level Synthesis

High-Level Synthesis (HLS) has been gaining traction in the mainstream for the past couple of years. But, HLS is good for a lot more than just increasing development productivity. In this episode of Chalk Talk, Amelia Dalton chats with David Pursley of Cadence Designs Systems about the new Stratus High-Level Synthesis technology, and how it will impact design productivity as well as the deployment and distribution of IP.

Performance-per-Watt with FinFET-based All Programmable Architectures

Performance per watt is one of the most critical metrics for most system designers today. In the past, we could often focus on performance without thinking about power, but today's highly-constrained designs demand energy efficiency more than ever. In this episode of Chalk Talk, Amelia Dalton chats with Ehab Mohsen and Maureen Smerdon of Xilinx about optimizing your design for maximum performance per watt.

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Integrating Electronic Design Analysis Upstream, Downstream, and Sideways

PCB Design demands a great deal more care these days. Signal and power integrity are just some of the realities that board designers must contend with these days. In this episode of Chalk Talk, Amelia Dalton talks with Brad Griffin of Cadence Design Systems about the integration of these important analysis capabilities into the PCB design process.

Top 10 Reasons Real Signal Integrity Engineers Demand Power-Aware SI Technology

Signal Integrity analysis that doesn't consider power effects can set you up for some dangerous problems. Ground bounce and other effects can cause problems that normal SI tools won't detect. In this episode of Chalk Talk, Amelia Dalton discusses power-aware signal integrity analysis with Brad Griffin of Cadence Design Systems. You'll want to watch to see what your SI tool may have been missing.

Xilinx Agile Mixed Signal

In this episode of Chalk TalkHD Amelia chats with Steve Logan (Xilinx ) and they're going to tell you all about Agile Mixed Signal, and how it can dramatically improve the capabilities of your next FPGA design.

A Review of BCDlite

GLOBALFOUNDRIES offers BCDliteTM foundry technology optimized for applications such as power management devices, audio amplifiers, displays and LED driver integrated circuits (ICs).

Solution for Heterogeneous Multicore Embedded Systems

Designing software for heterogeneous multicore embedded systems is a daunting challenge. Each of those words "heterogeneous", "Multicore", and "embedded" represents something that can cause a major breakdown in the normal software development flow. In this episode of Chalk Talk, Amelia Dalton chats with Felix Baum of Mentor Graphics about challenges and solutions for heterogeneous multicore embedded design.

Smart, Scalable Debugging with ZeBu

Modern SOC realization requires a development effort beyond that of traditional hardware verification. Creating a complete application-ready SOC platform now includes pre-tapeout software validation and hardware/software co-verification using full-chip RTL models. These billion-cycle scenarios are often beyond the scope of HDL simulation, but are ideal for emulation using EVE’s ZeBu hardware-assisted verification platforms.

Vivado IP Integrator

Even the best "plug and play" IP blocks are far from fool-proof. One of the most challenging aspects of IP-based design can be getting the blocks stitched together properly, making sure you have the right version of all the IP blocks, and confirming the configuration of your whole design. In this episode of Chalk Talk, Amelia Dalton chats with Tim Vanevenhoven about the powerful correct-by-construction automation built into the IP Integrator in Vivado Design Suite from Xilinx. IP Integrator seriously raises the bar on automation of IP-based design.

Developing Clean Efficient Power with LLC Resonant Converters with Infineon

Ready to get your black belt in DC power conversion? In this episode of Chalk Talk, Amelia Dalton chats with Sam Abdel-Rahman of Infineon about how to make a versatile, high-efficiency, LLC resonant mode power converter. So, buckle up, hit play, and get your DC on!

Introducing Palladium Z1 Enterprise Emulation Platform

Emulation is critical in the development of just about every complex IC these days, but most emulation systems are burdened with proprietary standards and form factors that don't scale well. In this episode of Chalk Talk, Amelia Dalton talks with Frank Schirrmeister of Cadence Design Systems about the new Palladium Z1 datacenter-class emulation system, which was designed with the capacity and scalability required for today's most challenging designs.

Rigid-Flex and Embedded Components

These days, flexibile circuit boards are making their way into the mainstream. Rigid-flex design gives us all kinds of new capabilities in form factor, as well as the opportunity to replace expensive and unreliable cables and connectors. But, how do you handle rigid-flex PCB design in your layout tools? In this episode of Chalk Talk, Amelia Dalton chats with Altium's Ben Jordan about rigid-flex design in Altium Designer - and how you can use those same capabilities for embedded components as a bonus!

Routing Interfaces Quickly & Efficiently on PCBs

In today's PCB designs, interfaces such as DDR pose major challenges for layout. Issues like timing and signal integrity can be tricky for even the most experienced designer. In this episode of Chalk Talk, Amelia Dalton chats with Hemant Shah of Cadence Design Systems about routing those tricky bits using a combination of automatic and manual routing techniques.

Tensilica Fusion DSP for IoT, Wearables, Communications

IoT and wearable designs often require big DSP processing power on a tiny energy budget. But, conventional processors are not well suited to these kinds of applications. In this episode of Chalk Talk, Amelia Dalton talks with Chris Rowen of Cadence Design Systems about Tensilica customized DSP processors that are ideally suited for these demanding IoT tasks.

Connecting ZYNQ-7000 All Programmable SoCs with TE Connectivity Interconnect Products

New SoCs like the Xilinx Zynq are changing the industry - with new levels of functionality, flexibility, performance, and power efficiency. But, to take advantage of this new technology you'll need connectivity solutions that are up to the task. In this episode of Chalk Talk, Amelia Dalton chats with Mark Bell from TE Connectivity about plugs, connectors, antennas, and other connectivity solutions for today's most demanding designs.

Cadence Tempus Timing Signoff Solution

Achieving timing closure for signoff can be a daunting challenge in today's complex designs. Meeting timing under all conditions - with the certainty required for signoff - is a complex and demanding task. In this episode of Chalk Talk, Amelia Dalton talks to Ruben Molina of Cadence Design Systems about the special challenges of signoff timing closure, and Cadence's new Tempus timing analysis tool.

How to Design a Sigma Delta Mixer Circuit

In parts 1 & 2 of this 3-part Chalk Talk series, we talked about how Triad Semiconductor can save you 75%, or even as much as 99% in your next mixed-signal ASIC design. But, what good is savings if you don't know what you can design with it? In this third episode of our 3-part Chalk Talk series, Amelia and Reid Wender of Triad Semiconductor have fun taking ViaDesigner out for a spin - designing a sigma delta mixer.

Performance-per-Watt with FinFET-based All Programmable Architectures

Performance per watt is one of the most critical metrics for most system designers today. In the past, we could often focus on performance without thinking about power, but today's highly-constrained designs demand energy efficiency more than ever. In this episode of Chalk Talk, Amelia Dalton chats with Ehab Mohsen and Maureen Smerdon of Xilinx about optimizing your design for maximum performance per watt.


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