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MathWorks Connects to Hardware

The Maker movement is exploding right now, and most of the cool projects require doing some math. In this episode of Chalk Talk, Amelia Dalton chats with Amnon Gai of The MathWorks about using the powerful capabilities of MATLAB and Simulink in anything from your next maker hobby project to full-blown industrial designs.

Meet ARTY: the $99 FPGA Development Kit from Xilinx

Have you been wanting to try FPGA design? Were FPGA development boards and tools always too expensive and difficult to use? In this episode of Chalk Talk, Amelia Dalton chats with Darren Zacher and Jim Burnham of Xilinx about ARTY, a new, easy-to-use $99 FPGA-based embedded development kit from Xilinx.

Efficient Product Creation with Allegro and Sigrity Solutions

Being a PCB Expert isn't enough anymore. With today's interconnected systems, you need to design at the product level to be competitive. In this episode of Chalk Talk, Amelia Dalton chats with Hemant Shah of Cadence Design Systems about product design with Cadence's Allegro and Sigrity tools.

The Market Shift to Integrated Physical Prototyping

FPGA-based physical prototyping is the go-to standard for high-performance, high-productivity verification, debug, and software development on many electronic systems today. But, it is becoming increasingly difficult to put together an ad hoc prototype mixing pieces from various vendors with home-grown components. With the complexity of today's systems, an integrated prototyping system can bring significant advantages. In this episode of Chalk Talk, Amelia Dalton chats with Neil Songcuan of Synopsys about the powerful HAPS integrated prototyping solution.

Cadence Perspec System Verifier SW Driven SoC Verification Automation

To verify your next system design, you'll need a lot of use cases. But, creating, tracking, sharing, and running those use cases can be a nightmare. In this episode of Chalk Talk, Amelia Dalton chats with Larry Melling of Cadence Design Systems about the new Cadence Perspec System Verifier and how you can take advantage of its power and flexibility in your system-level design verification.

The Power to Amaze: Fairchild 100V PowerTrench® MOSFETs

Are your power MOSFETs struggling to keep up with the demands of your system? In this episode of Chalk Talk, Amelia Dalton chats with Mike Speed of Fairchild Semiconductor about the new Fairchild 100V PowerTrench MOSFETs. With the efficient performance of these new transistors, your MOSFET worries may be over.

Announcing Indago Debug Platform

Debugging your design should be a lot more sophisticated than a bunch of "printf" statements. But that is exactly what many development teams end up using. In this episode of Chalk Talk, Amelia Dalton chats with Adam Sherer of Cadence Design Systems about the new Indago embedded debug system. It will change the way you think about debug.

Analog to Digital Conversion

High-speed analog signals pose special challenges for analog to digital conversion (ADC). Applications like software-defined radio, radar, instrumentation, and high-speed wireless require ADC that is high-performance, high-accuracy, and low-power. In this episode of Chalk Talk, Amelia Dalton chats with Trent Butcher of Microchip Technology about solving the issues of high-speed ADC.

Thermal Management

We often find ourselves needing to measure temperature and take some action in our designs. But, thermal management can be a complicated area, with a lot of alternatives in terms of sensors and supporting circuitry. In this episode of Chalk Talk, Amelia Dalton chats with John Austin of Microchip Technology about the numerous options for thermal management solutions.

i.MX 6SoloX – Freescale’s New Heterogeneous Multicore Applications Processor

Many applications today need both an applications processor AND a real-time MCU. But, most solutions don't offer both on the same chip. In this episode of Chalk Talk, Amelia Dalton chats with Amanda McGregor of Freescale about a new application processor that combines an ARM Cortex-A9 core with the efficiency and real-time capability of the Cortex-M4.

De-Risk Yield Manufacturing Ramp-up with Veloce DFT App

Get DFT off the critical path on your next chip design. In this episode of Chalk Talk, Amelia Dalton chats with Jean-Marie Brunet of Mentor Graphics about how you can use emulation to significantly improve your DFT productivity.

Low Light Surveillance Imaging

Designing embedded vision applications for low-light situations has to start with the right image sensor. Your vision analytics cannot identify what your camera cannot see. In this episode of Chalk Talk, Amelia Dalton chats with Michael DeLuca from ON Semiconductor about low-light surveillance imaging.

Architecture Matters: Three Architectural Insights for SoC FPGAs

New devices that combine the power and flexiblility of FPGAs and conventional processors on a single chip represent a breakthrough in capability. But, understanding the complex architecture of these sophisticated components requires us to look under the hood to see how the architecture fits our design requirements, and how to choose the right chip for our application. In this episode of Chalk Talk, Amelia Dalton talks with Todd Koelling of Altera about what to look for in the architecture of your SoC FPGA.

10 Secrets to Getting a Lower BOM Cost

Reducing your BOM costs can be a complex challenge. If your design includes programmable logic, you have a lot of powerful options for reducing cost that might not be obvious simply by looking at component costs. In this episode of Chalk Talk, Amelia Dalton chats with Maureen Smerdon and Darren Zacher of Xilinx about minimizing BOM costs in your next design.

Maxim Integrated’s High Efficiency Power Solutions for 24V+ Systems

With form factors continuing to shrink, it's becoming more and more difficult to pack an efficient power supply into the available space. In this episode of Chalk Talk, Amelia Dalton chats with Suhel Dhanani of Maxim Integrated about building small, efficient industrial power supplies.

UltraRAM: Massive On-Chip Memory for FPGAs and MPSoCs

There is a significant gap between FPGA on-chip memories and off-chip memories that causes problems in some applications. What we need to fill that gap are much larger on-chip memory resources to fill that need. In this episode of Chalk Talk, Amelia Dalton chats with Ehab Mohsen of Xilinx about the new UltraRAM blocks in Xilinx FPGAs and Zynq MPSoCs.

Top 10 Reasons Real Signal Integrity Engineers Demand Power-Aware SI Technology

Signal Integrity analysis that doesn't consider power effects can set you up for some dangerous problems. Ground bounce and other effects can cause problems that normal SI tools won't detect. In this episode of Chalk Talk, Amelia Dalton discusses power-aware signal integrity analysis with Brad Griffin of Cadence Design Systems. You'll want to watch to see what your SI tool may have been missing.

Model-Based Design for Xilinx Zynq & Altera SoC Devices

You'll get way more out of your Xilinx Zynq or Altera SoC device if you have a smooth design flow from MATLAB and Simulink. Luckily, MathWorks has already thought of that. In this episode of Chalk Talk, Amelia Dalton chats with Eric Cigan of MathWorks about Model-Based Design for this new powerful class of programmable devices.

Vivado Design Suite HLx Editions

High-level design methods can dramatically increase your productivity. Now that technologies like high-level synthesis (HLS) have gone mainstream, we can make some serious improvements to our FPGA design process. In this episode of Chalk Talk, Amelia Dalton chats with Tim Vanevenhoven of Xilinx about how the new HLx editions of Vivado Design suite are taking high-level design mainstream.

SI? Why do I Care?

Signal Integrity isn’t just for “experts” anymore. Most designs these days have high-speed interfaces that require a solid strategy for signal integrity. In this episode of Chalk Talk, Amelia Dalton chats with Matthew Burns from Samtec about simplifying signal integrity in your next system design.

Accelerating Your Analog Output Design

Eventually, most of our designs need to control something in the real world. That means we have to bust out of our safe little digital realm, and drive some analog actuators or something similar. But, building that analog output section from scratch can be a real challenge. In this episode of Chalk Talk, Amelia Dalton talks to Bill Laumeister of Maxim Integrated about the Analog Output Design Accelerator Kit (MAXREFDES24EVSYS), a complete platform for easy evaluation that requires no lab equipment.

chalk talks

Physically Aware Synthesis Techniques to Lower Power, Improve Timing, Congestion & Correlation

Synthesis is the single most important step in creating a high-quality implementation of our design. But, we can't expect our synthesis tool to produce the best results without considering the very important effects of routing delay introduced by placement and routing. In this episode of Chalk Talk, Amelia Dalton talks with David Stratman of Cadence about how to apply physically-aware synthesis techniques to improve the overall quality of your design.

Analog to Digital Conversion

High-speed analog signals pose special challenges for analog to digital conversion (ADC). Applications like software-defined radio, radar, instrumentation, and high-speed wireless require ADC that is high-performance, high-accuracy, and low-power. In this episode of Chalk Talk, Amelia Dalton chats with Trent Butcher of Microchip Technology about solving the issues of high-speed ADC.

Cadence Tempus Timing Signoff Solution

Achieving timing closure for signoff can be a daunting challenge in today's complex designs. Meeting timing under all conditions - with the certainty required for signoff - is a complex and demanding task. In this episode of Chalk Talk, Amelia Dalton talks to Ruben Molina of Cadence Design Systems about the special challenges of signoff timing closure, and Cadence's new Tempus timing analysis tool.

Abstract and Conquer: A New Alternative to Hierarchical Timing Analysis

Sign-off timing analysis for today’s complex SoC designs can be daunting. Rather than just throwing more computer power at the problem, you need to adopt a hierarchical approach and take advantage of higher levels of abstraction. In this episode of Chalk Talk, Amelia Dalton talks with Ruben Molina of Cadence Design Systems about a new, faster approach to sign-off timing analysis.

Enabling New Applications with NFC Connectivity and Energy Harvesting

In this episode of Chalk TalkHD Amelia chats with Greg Proehl (STMicroelectronics) about the basics of NFC technology, and they explore some interesting NFC applications as well as cool and innovative new NFC solutions from ST - including one with energy harvesting capability.

Announcing Indago Debug Platform

Debugging your design should be a lot more sophisticated than a bunch of "printf" statements. But that is exactly what many development teams end up using. In this episode of Chalk Talk, Amelia Dalton chats with Adam Sherer of Cadence Design Systems about the new Indago embedded debug system. It will change the way you think about debug.

Efficient Product Creation with Allegro and Sigrity Solutions

Being a PCB Expert isn't enough anymore. With today's interconnected systems, you need to design at the product level to be competitive. In this episode of Chalk Talk, Amelia Dalton chats with Hemant Shah of Cadence Design Systems about product design with Cadence's Allegro and Sigrity tools.

Vivado Design Suite HLx Editions

High-level design methods can dramatically increase your productivity. Now that technologies like high-level synthesis (HLS) have gone mainstream, we can make some serious improvements to our FPGA design process. In this episode of Chalk Talk, Amelia Dalton chats with Tim Vanevenhoven of Xilinx about how the new HLx editions of Vivado Design suite are taking high-level design mainstream.

latest papers and content

Avnet LED Solutions: Smart Lighting, Intelligent Lighting and the Puzzle

The switch to LED lighting creates huge opportunities for IoT in addition to the obvious power and cost benefits. In this episode of Chalk Talk, Amelia Dalton chats with Peter Bolan and Bob Householder of Avnet about the fascinating and exciting engineering innovations following in the wake of LED technology.

Introducing RocketSim Engine: The Fastest Digital Simulator

Speed is one of the most important attributes of a simulator today. With the rapid growth of designs, performance of the simulator can be critical in getting a project finished on time - or at all. In this episode of Chalk Talk, Amelia Dalton chats with David Lidrbauch of Cadence Design Systems about RocketSim, the new standard for simulation speed.

SI? Why do I Care?

Signal Integrity isn’t just for “experts” anymore. Most designs these days have high-speed interfaces that require a solid strategy for signal integrity. In this episode of Chalk Talk, Amelia Dalton chats with Matthew Burns from Samtec about simplifying signal integrity in your next system design.

Enabling Embedded Vision

Embedded Vision is one of today's most challenging applications. We need incredible processing power, lightning-fast latency, and very low energy consumption. In this episode of Chalk Talk, Amelia Dalton chats with Aaron Behman of Xilinx about the exciting world of embedded vision.

How to Design an Automotive Power Supply

Supplying power for today's advanced automotive applications can be a tricky task. Getting the right voltages with the right tolerances and current capacities has become a complex engineering problem. In this episode of Chalk Talk, Amelia Dalton talks with Vik Patel from Infineon about simplifying the task of automotive power supply design.

How to Build Custom Motor Controllers for Processors, FPGAs and SoCs

Controlling motors in your design can be a complex business. Most engineers are focused on other aspects of the design, but are not experts in motor control. In this episode of Chalk Talk, Amelia Dalton talks to Eric Cigan of MathWorks about simplifying the motor control design process. We'll have you up and spinning in no time!

Simulating Systems with PSpice

Simple simulation just doesn't cut it with today's complex board designs. To manage the tradeoff between accuracy and performance, you need a variety of models with multiple levels of abstraction. In this episode of Chalk Talk, Amelia Dalton chats with Parag Choudhary of Cadence Design Systems about simulating with PSpice.

The Power to Amaze: Fairchild 100V PowerTrench® MOSFETs

Are your power MOSFETs struggling to keep up with the demands of your system? In this episode of Chalk Talk, Amelia Dalton chats with Mike Speed of Fairchild Semiconductor about the new Fairchild 100V PowerTrench MOSFETs. With the efficient performance of these new transistors, your MOSFET worries may be over.

Expanding the Backplane Ecosystem

Don’t you wish you’d chosen a more flexible and future-proof backplane technology? In this episode of Chalk Talk, Amelia Dalton talks to Matthew Burns from Samtec about backplane systems that bring the performance and flexibility you need to keep your system running for a long, long time.

How to "Shift Left" for Agile Hardware Design

Want to apply agile development techniques to hardware design? In this episode of Chalk Talk, Amelia Dalton chats with Jack Erickson of MathWorks about “Shifting Left” and “Agile” as applied to your hardware engineering process.

Targeting SDR Design to Hardware

Software defined radio (SDR) design is a complex dance of hardware and software. In this episode of Chalk Talk, Amelia Dalton chats with Noam Levine from MathWorks about how to simplify the implementation of SDR in hardware.

Six Hidden Costs of Wireless SoC Design

Modules offer an attractive alternative to wireless SoCs in many situations. In this episode of Chalk Talk, AD chats with Joe Tillison from Silicon Labs about six hidden costs of doing a wireless SoC design.

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Genus Synthesis Solution: Massively Parallel RTL Synthesis

Synthesis of large designs can be a major bottleneck, particularly with the number of iterations often required and the long synthesis runtimes of current generation tools. In this episode of Chalk Talk, Amelia Dalton chats with David Stratman of Cadence Design Systems about the revolutionary new Genus massively-parallel synthesis technology. Genus promises to have an enormous impact on the synthesis bottleneck.

UltraRAM: Massive On-Chip Memory for FPGAs and MPSoCs

There is a significant gap between FPGA on-chip memories and off-chip memories that causes problems in some applications. What we need to fill that gap are much larger on-chip memory resources to fill that need. In this episode of Chalk Talk, Amelia Dalton chats with Ehab Mohsen of Xilinx about the new UltraRAM blocks in Xilinx FPGAs and Zynq MPSoCs.

Avnet LED Solutions: Smart Lighting, Intelligent Lighting and the Puzzle

The switch to LED lighting creates huge opportunities for IoT in addition to the obvious power and cost benefits. In this episode of Chalk Talk, Amelia Dalton chats with Peter Bolan and Bob Householder of Avnet about the fascinating and exciting engineering innovations following in the wake of LED technology.

10 Secrets to Getting a Lower BOM Cost

Reducing your BOM costs can be a complex challenge. If your design includes programmable logic, you have a lot of powerful options for reducing cost that might not be obvious simply by looking at component costs. In this episode of Chalk Talk, Amelia Dalton chats with Maureen Smerdon and Darren Zacher of Xilinx about minimizing BOM costs in your next design.

DC Brushed Motor Applications

Brushed DC motors are the go-to solution for thousands of applications. And, although most of us have experience with brushed motors at some point, few of us have taken the time to become experts. In this episode of Chalk Talk, Amelia Dalton chats with David Witt from Infineon about the finer points of brushed DC motor theory, and they look at some helpful motor control solutions from Infineon.

Function Enablement with 8-bit PIC Microcontrollers

For a lot of mainstream applications these days, 32-bit or even 16-bit processors are serious overkill. You can get great performance, smaller footprints, lower power consumption, and lower cost using 8-bit devices. In this episode of Chalk Talk, Amelia Dalton talks with Wayne Freeman of Microchip Technology about function enablement with 8-bit MCUs.

Simplifying Industrial Ethernet Design

In this episode of Chalk TalkHD Amelia chats with Suhel Dhanani of Altera about the who, what, and how of industrial ethernet design.

Bridging MIPI Technologies with ULD FPGAs

With mobile-based standards such as MIPI sweeping the design landscape, we will often find ourselves in the situation of needing to bridge between legacy interfaces and newer MIPI-based ones. In this episode of Chalk Talk, Amelia Dalton talks to Ted Marena of Lattice Semiconductor about using ultra-low-density FPGAs in mobile devices to enable us to get our other interfaces to play nicely with MIPI - with form-factors and power efficiency that are right at home in mobile devices.

i.MX 6SoloX – Freescale’s New Heterogeneous Multicore Applications Processor

Many applications today need both an applications processor AND a real-time MCU. But, most solutions don't offer both on the same chip. In this episode of Chalk Talk, Amelia Dalton chats with Amanda McGregor of Freescale about a new application processor that combines an ARM Cortex-A9 core with the efficiency and real-time capability of the Cortex-M4.

TI LaunchPad Ecosystem

Turning your idea into a working project begins with a good development kit. Launchpad from Texas Instruments offers a robust, affordable starting point to make your next idea a reality. In this episode of Chalk Talk, Amelia Dalton talks to Daniel Ogilvie of Texas Instruments about the latest on TI's popular LaunchPad.

Cadence Low Power Solution - RTL to GDSII Low Power Design

Low-power design used to be an afterthought. Today, however, we need to consider power throughout the entire design cycle - from RTL all the way through GDSII. And, we can have significant impact on overall power consumption with optimizations at just about every stage. In this episode of Chalk Talk, Amelia Dalton chats with Pete Hardee of Cadence about a holistic approach to low-power design.

Introduction to the New Virtuoso ADE Product Suite

Do different members of your team have different requirements and challenges for your analog design tools? In this episode of Chalk Talk, Amelia Dalton chats with Steve Lewis of Cadence Design Systems about the new capabilities in Cadence's Virtuoso ADE Product Suite - capabilities that will make everyone on your team happy.

Why Do I Need a Customizable ARM-based SoC?

In this episode of Chalk TalkHD Amelia chats with Todd Koelling of Altera about what’s inside these new SoC FPGAs and how you can get started designing with them.

Meet PPA and Turnaround Time Requirements at Advanced Nodes with Innovus Implementation System

Today's complex IC designs demand a new generation of high-capacity, high-performance implementation tools. In this episode of Chalk Talk, Amelia Dalton chats Yufeng Luo of Cadence Design Systems about the incredible innovations in Cadence's new Innovus implementation suite.

Cadence Tempus Timing Signoff Solution

Achieving timing closure for signoff can be a daunting challenge in today's complex designs. Meeting timing under all conditions - with the certainty required for signoff - is a complex and demanding task. In this episode of Chalk Talk, Amelia Dalton talks to Ruben Molina of Cadence Design Systems about the special challenges of signoff timing closure, and Cadence's new Tempus timing analysis tool.


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