feature article
Subscribe Now

Six Ways to Replace a Microcontroller With a CPLD

With the advent of low-power CPLDs, low-power electronic product designers now have new options for implementing many of the functions traditionally performed by microcontrollers. This white paper discusses when it is advantageous to use a CPLD instead of a microcontroller, and when it makes sense to use a CPLD as a companion to a microcontroller.

Introduction

Tell a group of portable electronics designers that there is a low-power digital device that allows them to use a software program to reconfigure the operation of the hardware, and nine out of ten will assume that it is some form of a microcontroller. This is understandable. With a vast array of features and packages, abundance of software development tools, and huge library of application code, the ubiquitous microcontroller has found a home in nearly every type of portable application. However, with the arrival of low-power CPLDs, designers now have new options for implementing many of the functions traditionally performed by microcontrollers.

The examples given in this white paper are grouped into three categories, based on their function and level of complexity. The first category is I/O management, focusing on pin-level applications. The second category is port management, with the emphasis on the various interfaces between devices. The third category is system management, for applications that use a pin or port to control system-level functions.

Designers who are new to programmable logic will find many aspects of CPLD design to be similar to designing with traditional microcontrollers. A simplified description of CPLD design flow is as follows:

  1. The design is written in a high-level language, such as Verilog or VHDL, using a software development tool.
  2. The design is simulated for functional correctness.
  3. The design is “fit” to a particular CPLD, providing the physical aspects such as resource utilization and timing paths.
  4. The design is simulated for timing correctness. 
  5. The design is programmed into the physical device. 

One major difference is the availability of sophisticated in-circuit emulators for microcontroller check out. However, once the nuances of the programmable technology are understood, microcontroller designers do well with CPLD design.

Examples of CPLDs Replacing Microcontrollers

This section describes some applications where a CPLD can cost-effectively replace a microcontroller.

I/O Management

When considering whether to use a CPLD or a microcontroller for I/O management, the quantity and the type of I/Os needed are critical considerations. Microcontrollers enjoy a reputation as small and inexpensive, and certainly, there are many small, inexpensive microcontrollers from which a designer can choose. However, if an application requires a large quantity of general-purpose I/Os, often a CPLD can be cost-competitive with a microcontroller. Small, inexpensive microcontrollers are usually limited to a serial port and, at most, a few general-purpose I/O pins. Designers discover that microcontrollers with dozens of I/Os are no longer so small and inexpensive. CPLDs, on the other hand, tend to be I/O intensive; it is not uncommon for a small form factor CPLD to have well over 50 I/Os. For example, the Altera® MAX® IIZ EPM240Z CPLD in a 5-mm-by-5-mm package has 80 I/Os.

Author: Rafael Camarota, Non-Volatile Product Line Manager, Low-Cost Products

Mr. Camarota joined Altera in 2002, where he is responsible for all CPLDs, and configuration products. He has more than 25 years of semiconductor experience and in the PLD industry. He holds a BSEE from Carnegie-Mellon University, and has over 25 patents relating to programmable logic circuits.

Leave a Reply

featured blogs
Apr 18, 2024
Analog Behavioral Modeling involves creating models that mimic a desired external circuit behavior at a block level rather than simply reproducing individual transistor characteristics. One of the significant benefits of using models is that they reduce the simulation time. V...
Apr 16, 2024
Learn what IR Drop is, explore the chip design tools and techniques involved in power network analysis, and see how it accelerates the IC design flow.The post Leveraging Early Power Network Analysis to Accelerate Chip Design appeared first on Chip Design....
Mar 30, 2024
Join me on a brief stream-of-consciousness tour to see what it's like to live inside (what I laughingly call) my mind...

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured chalk talk

Industrial Internet of Things (IIoT)
Sponsored by Mouser Electronics and Eaton
In this episode of Chalk Talk, Amelia Dalton and Mohammad Mohiuddin from Eaton explore the components, communication protocols, and sensing solutions needed for today’s growing IIoT infrastructure. They take a closer look at how Eaton's circuit protection solutions, magnetics, capacitors and terminal blocks can help you ensure the success of your next industrial internet of things design.
Jun 14, 2023
35,007 views