industry news
Subscribe Now

Synopsys Extends Portfolio of ASIL Ready ISO 26262 Certified DesignWare IP

MOUNTAIN VIEW, Calif., April 25, 2017 /PRNewswire/ —

Highlights:

  • New ASIL B Ready certified controllers and PHY IP includes PCI Express, USB, MIPI and LPDDR4
  • Industry’s first ASIL D Ready ISO 26262 certified EEPROM and Trim NVM IP deliver high-reliability targeting less than one defective part per million
  • Certified IP with safety packages, FMEDA and safety manuals accelerates SoC-level ISO 26262 functional safety assessments

Synopsys, Inc. (Nasdaq: SNPS) today announced it has extended its portfolio of ASIL B and D Ready ISO 26262 certified DesignWare® IP to include PCI Express® 3.1 controller and PHY, USB 3.0 controller, MIPI CSI-2 controllers and D-PHY, LPDDR4 PHY, EEPROM and Trim NVM. The IP was certified by SGS-TÜV Saar, an independent training, testing and certification organization serving the automotive industry. The certified IP consists of automotive safety packages that include failure modes, effects, and diagnostic analysis (FMEDA) reports and safety manuals, giving designers the documentation needed to complete their own certification process. By providing ASIL B and D Ready IP, Synopsys helps designers accelerate their ISO 26262 functional safety assessments and reach automotive safety integrity levels (ASILs) required for their automotive SoCs.

“As electronic processing capabilities increase in automotive applications such as ADAS, it is crucial for companies to ensure that their solutions are ISO 26262 certified for functional safety,” said Wolfgang Ruf, head of Functional Safety for Semiconductors at SGS-TÜV Saar GmbH. “By providing ASIL Ready certified IP that has gone through a rigorous testing and validation process, Synopsys enables SoC designers to meet the stringent, safety-critical requirements of the automotive industry.”

Synopsys DesignWare IP for automotive SoCs includes safety features such as:

  • Error correcting code (ECC) protection for detecting and correcting transient and permanent errors
  • Parity protection on data path and configuration registers for ensuring correct data is carried through the SoC
  • Debug capabilities, error injection and statistics monitoring for comprehensive system testing
  • Diagnostic circuits to periodically test for errors that violate safety goals

In addition to ASIL Ready certified IP, Synopsys provides the necessary design failure mode and effect analysis (DFMEA) reports and implements organizations, policies and processes to meet automotive quality requirements. The IP is designed for high-reliability and tested against applicable AEC-Q100 specifications, enabling designers to reduce design risk and development time for achieving AEC-Q100 qualification.

“Meeting stringent reliability and safety requirements is critical for automotive applications such as collision avoidance, pedestrian detection and lane departure warning,” said John Koeter, vice president of marketing for IP at Synopsys. “By making significant investments in DesignWare IP solutions that are ASIL Ready certified, Synopsys enables designers to accelerate their development schedules and time to automotive certification for their SoCs.”

Availability & More Resources

The ASIL Ready certified DesignWare IP portfolio for automotive SoCs is available now:

  • ASIL D Ready: MTP EEPROM and FTP Trim NVM, ARC® EM processors with Safety Enhancement Package, ARC EM Safety Islands, Embedded Memories, STAR Hierarchical System and STAR Memory System®
  • ASIL B Ready: PCI Express 3.1 controller and PHY, USB 3.0 controller, MIPI CSI-2 controllers and D-PHY, LPDDR4 PHY and Ethernet QoS

For more information, visit the DesignWare IP for automotive SoCs web page.

About DesignWare IP

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys’ IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys’ extensive investment in IP quality, comprehensive technical support and robust IP development methodology enable designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit www.synopsys.com/designware.

Synopsys Automotive: Enabling Safe, Secure, Smarter Cars – from Silicon to Software

Customers across the automotive supply chain use Synopsys’ Silicon to Software™ solutions to develop ICs and software for infotainment, ADAS, V2X and autonomous driving applications. Synopsys’ portfolio of automotive-specific IC design and verification tools, automotive-grade IP and automotive software cybersecurity and quality solutions accelerate time to market and enable the next generation of safe, secure and smarter connected cars. Learn more at www.synopsys.com/solutions/automotive.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world’s 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you’re a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.

Leave a Reply

featured blogs
Apr 19, 2024
In today's rapidly evolving digital landscape, staying at the cutting edge is crucial to success. For MaxLinear, bridging the gap between firmware and hardware development has been pivotal. All of the company's products solve critical communication and high-frequency analysis...
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...
Apr 18, 2024
See how Cisco accelerates library characterization and chip design with our cloud EDA tools, scaling access to SoC validation solutions and compute services.The post Cisco Accelerates Project Schedule by 66% Using Synopsys Cloud appeared first on Chip Design....

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured chalk talk

Improving Chip to Chip Communication with I3C
Sponsored by Mouser Electronics and Microchip
In this episode of Chalk Talk, Amelia Dalton and Toby Sinkinson from Microchip explore the benefits of I3C. They also examine how I3C helps simplify sensor networks, provides standardization for commonly performed functions, and how you can get started using Microchips I3C modules in your next design.
Feb 19, 2024
8,455 views