industry news
Subscribe Now

Cadence Expands Capabilities of Integrated Design and Analysis Flow for TSMC InFO Packaging Technology

SAN JOSE, Calif., 13 Mar 2017

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced new optimization capabilities within its holistic, integrated design flow for TSMC’s advanced wafer-level Integrated Fan-Out (InFO) packaging technology. The integrated flow provides design and analysis capabilities and modeling of cross-die interactions for mobile and IoT applications. For more information on the TSMC InFO design flow, visit www.cadence.com/go/tsmcinfotech.

The Cadence® tools in the enhanced flow include the OrbitIO™ interconnect designer, System-in-Package (SiP) Layout, Quantus™ QRC Extraction Solution, Sigrity™ XtractIM™ technology, Tempus™ Timing Signoff Solution, Physical Verification System (PVS), Voltus™-Sigrity Package Analysis, Sigrity PowerDC™ technology and Sigrity PowerSI® 3D-EM Extraction Option. With the new flow, system-on-chip (SoC) designers can:

  • Quickly generate netlists among the multiple dies and InFO package in the context of the full system within a single-canvas multi-fabric environment: The OrbitIO interconnect designer efficiently handles multi-die integrations with TSMC InFO technologies to generate top-level netlists that can be directly used for subsequent design steps such as detailed electrical and timing analysis.
  • Generate Standard Parasitic Exchange Format (SPEF) directly from the package design database, which greatly eases timing signoff: Rather than using a traditional methodology that requires converting the package design database of an InFO design to an IC design database to generate SPEF, Sigrity XtractIM technology automatically generates SPEF for heterogeneous InFO systems, which accelerates the timing signoff process and speeds time to market.

“We’ve continued to see strong demand from mobile and IoT customers who want to deploy systems based on TSMC’s InFO technology,” said Steve Durrill, senior product engineering group director at Cadence. “By working closely with TSMC, we are enabling our mutual customers to shorten design and verification cycle times so they can deliver reliable, innovative SoCs to market faster.”

“The Cadence flow developed specifically for our InFO technology is an enabler for customers who need to increase bandwidth within small form factors,” said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. “The integrated full-flow includes a comprehensive set of Cadence digital, signoff and custom IC technologies that address this market need, and our collaboration is helping customers to efficiently achieve their design goals.”

About Cadence

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence’s software, hardware and semiconductor IP are used by customers to deliver products to market faster—from semiconductors to printed circuit boards to whole systems. The company’s System Design Enablement strategy helps customers develop differentiated products in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of FORTUNE Magazine’s 100 Best Companies to Work For. Learn more at cadence.com.

Leave a Reply

featured blogs
Mar 28, 2024
The difference between Olympic glory and missing out on the podium is often measured in mere fractions of a second, highlighting the pivotal role of timing in sports. But what's the chronometric secret to those photo finishes and record-breaking feats? In this comprehens...
Mar 26, 2024
Learn how GPU acceleration impacts digital chip design implementation, expanding beyond chip simulation to fulfill compute demands of the RTL-to-GDSII process.The post Can GPUs Accelerate Digital Design Implementation? appeared first on Chip Design....
Mar 21, 2024
The awesome thing about these machines is that you are limited only by your imagination, and I've got a GREAT imagination....

featured video

We are Altera. We are for the innovators.

Sponsored by Intel

Today we embark on an exciting journey as we transition to Altera, an Intel Company. In a world of endless opportunities and challenges, we are here to provide the flexibility needed by our ecosystem of customers and partners to pioneer and accelerate innovation. As we leap into the future, we are committed to providing easy-to-design and deploy leadership programmable solutions to innovators to unlock extraordinary possibilities for everyone on the planet.

To learn more about Altera visit: http://intel.com/altera

featured chalk talk

Neutrik powerCON®: Twist and Latch Locking AC Power Connectors
Sponsored by Mouser Electronics and Neutrik
If your next design demands frequent connector mating and unmating and use in countries throughout the world, a twist and latch locking AC power connector would be a great addition to your system design. In this episode of Chalk Talk, Amelia Dalton and Fred Morgenstern from Neutrik explore the benefits of Neutrik's powerCON® AC power connectors, the electrical and environmental specifications included in this connector family, and why these connectors are a great fit for a variety of AV and industrial applications. 
Nov 27, 2023
16,189 views