fresh bytes
Subscribe Now

Memory reformat planned for Opportunity Mars rover

mars-merb-aug-10-2014-lg.jpg

An increasing frequency of computer resets on NASA’s Mars Exploration Rover Opportunity has prompted the rover team to make plans to reformat the rover’s flash memory. The resets, including a dozen this month, interfere with the rover’s planned science activities, even though recovery from each incident is completed within a day or two.

Flash memory retains data even when power is off. It is the type used for storing photos and songs on smart phones or digital cameras, among many other uses.

Individual cells within a flash memory sector can wear out from repeated use. Reformatting clears the memory while identifying bad cells and flagging them to be avoided.
via Mars Daily

Continue reading 

Image: NASA’s Mars rover Opportunity captured this view southward just after completing a 338-foot (103-meter) southward drive, in reverse, on Aug. 10, 2014. The foreground of this view from the rover’s Navcam includes the rear portion of the rover’s deck. The ground beyond bears wind-blown lines of sand. Image courtesy NASA/JPL-Caltech.

Leave a Reply

featured blogs
Apr 19, 2024
In today's rapidly evolving digital landscape, staying at the cutting edge is crucial to success. For MaxLinear, bridging the gap between firmware and hardware development has been pivotal. All of the company's products solve critical communication and high-frequency analysis...
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...
Apr 18, 2024
See how Cisco accelerates library characterization and chip design with our cloud EDA tools, scaling access to SoC validation solutions and compute services.The post Cisco Accelerates Project Schedule by 66% Using Synopsys Cloud appeared first on Chip Design....

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured chalk talk

Optimize Performance: RF Solutions from PCB to Antenna
Sponsored by Mouser Electronics and Amphenol
RF is a ubiquitous design element found in a large variety of electronic designs today. In this episode of Chalk Talk, Amelia Dalton and Rahul Rajan from Amphenol RF discuss how you can optimize your RF performance through each step of the signal chain. They examine how you can utilize Amphenol’s RF wide range of connectors including solutions for PCBs, board to board RF connectivity, board to panel and more!
May 25, 2023
37,161 views