Intel and Xilinx Take More Turf
It’s clear that programmable logic and FPGA technology will capture an increasing share of the value in conventional and cloud data-center deployments. While FPGAs have always been used in connectivity and storage, there is an ever-building push to have high-end FPGAs take over a crucial role in computation as well. FPGAs pack a potent combination of massive computational throughput, low latency, and power efficiency that is unmatched by any rival technology. With the huge growth of data-center demand fueled by IoT, continuing to power the cloud exclusively with conventional processors is just not feasible. Heterogeneous deployments of conventional processors and FPGAs working together have the potential to boost computational performance many times over and, more importantly, dramatically cut power consumption.
Perfecting the Recipe
What’s the most important thing for the perfect pizza? This isn’t a fair question, of course, because there’s no definition of “perfect” when it comes to pizza. OK, maybe there is, but each person has their own. But stay with me for a sec here: for a certain style of pizza, you need an oven that’s over 500 °F – higher than home ovens can go, for sure. And the right old-school wood-fired ovens can do that.
So if you’re in search of that perfect pizza, the first thing you might have to do is to splurge to get an oven that will finally give you the heat you need. You might play with the amount of wood you use, the best pizza positioning to ensure even heating, and the best oven placement for not burning the house down before you’re satisfied that you’ve nailed it. It could take a lot of work – probably more than you expected.
Hybrid Systems, Board Design and a Bowl Full of Standards
With a dash of mini PCIe, a couple heaping spoonfuls of VPX and VNX and a whole lot of SBCs, Bill Ripley (Alligator Designs) and I are cooking up the perfect recipe for hybrid rugged computing. In this week’s episode of Fish Fry, Bill and I discuss the role of standards in hybrid systems, the evolving role of COTs in ruggedized systems, and why Alligator Designs can enable board design that other COTS providers cannot or will not do. Also this week, we take a closer look at the trade-off between fixed- and floating-point math in DSP algorithm implementation.
Reports from ISSCC
Wow. It’s been six years. Where has the time gone?
Six years ago, I attended a session on sensors at the ISSCC conference. I decided to do a series of articles on the various sensors that were presented. This was my intro to the world of sensors, and, since then, we have embraced sensors and MEMS as they have evolved into the bigger-picture internet-of-things (IoT) theme.
The sensors were newish and somewhat obscure at the time. MEMS then blew up huge, although, as with all favorite sons and daughters, there’s always the risk that a newborn will steal the attention. A year later, MEMS Industry Group (now MEMS and Sensors Industry Group) director Karen Lightman felt that the MEMS space was pushed aside for top attention honors by the notion of 450-mm wafers. But, in retrospect, she won: it’s 2017, and MEMS is still important. 450-mm wafers? Not so much.
Surviving the Best Day of our Careers
The VP was obviously impressed. In fact, “blown away” wouldn’t have been overstating it. The demo had gone perfectly, and even when he’d asked questions that took us off script, we were able to show what he wanted to see. His excitement was palpable. I knew before he walked out the door that we’d get what we wanted.
Our little team, made up of some of the most talented software engineers I’d ever met, had been working 12-14 hours per day for the past two weeks to get this demo ready. In reality, a lot of it was smoke and mirrors. We’d cobbled together TCL scripts to fill in holes in our system where development hadn’t even been started yet. There were some places where the “values” that showed in the GUI were hard-coded. But, behind the scenes, the engine was actually running and doing its job. Databases were being written and read. Actual output files were being generated. It was REAL.
Or, probably, at least 90% real.
M4 + M0 Equals More
What would you do with 104 I/O pins, two CPU cores, two 8K caches, a touchscreen interface, Bluetooth, four AA batteries, and a gaggle of analog components? You may be about to find out.
Cypress has upgraded its programmable system-on-chip (PSoC) family of flexible microcontrollers with a new dual-core, security-enhanced, low-power family it calls PSoC 6. It’s the first dual-core chip from Cypress, and the first to use ARM’s Cortex-M4 processor. Previous generations of the PSoC used either the M0, the M0+, or the M3. So, upgrading to the M4 core is a step up, and adding an M0+ is a step-upper.