EEJournal

fish fry
Subscribe Now
March 20, 2013

These Silicon Times – They Are a Changin’

From Silicon to Tools and Back Again
by Amelia Dalton

With Moore’s Law in our back pocket, we’re hitching a ride to 2015 and the next process nodes. That’s right, we’re talking hardcore chip design. From your silicon dreams to their verified reality, we’re looking at each step of the chip design process with Frank Schirrmeister from Cadence Design Systems. Frank and I are going to chat about some serious top-to-bottom design flow business and try to map out a path to the future.

Also this week, I’ve got a Freescale Freedom Development Kit to give away (courtesy of Mouser Electronics) and you can enter to win by commenting on this week’s Fish Fry page.

Listen to this episode
Download this episode (right click and save)

Fish Fry Links – March 22, 2013

More Information about Cadence

2013 FPGA Design Tools Survey

More Information about The Freescale Freedom Development Platform

Leave a Reply

featured blogs
MaxLinear Is Staying at the Forefront of Connectivity Solutions with Cadence
Apr 19, 2024
In today's rapidly evolving digital landscape, staying at the cutting edge is crucial to success. For MaxLinear, bridging the gap between firmware and hardware development has been pivotal. All of the company's products solve critical communication and high-frequency analysis...
More from Cadence...
One Robotic Step Closer to Humanoid Robots in the Home
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...
More from Max's Cool Beans...
Cisco Accelerates Project Schedule by 66% Using Synopsys Cloud
Apr 18, 2024
See how Cisco accelerates library characterization and chip design with our cloud EDA tools, scaling access to SoC validation solutions and compute services.The post Cisco Accelerates Project Schedule by 66% Using Synopsys Cloud appeared first on Chip Design....
More from Synopsys...

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured chalk talk

Current Sense Shunts
Sponsored by Mouser Electronics and Bourns
In this episode of Chalk Talk, Amelia Dalton and Scott Carson from Bourns talk about the what, where and how of current sense shunts. They explore the benefits that current sense shunts bring to battery management and EV charging systems and investigate how Bourns is encouraging innovation in this arena.
Click here for more information about Bourns CSM2F High Power Current Sense Resistors
Jan 23, 2024
12,332 views