feature article
Subscribe Now

When Being One-Dimensional Is A Good Thing

Tela Innovations Announces Their Approach to Advanced Cell Layout

Driving in the country and in the city are completely different experiences. In the country, there’s so little traffic that you really don’t need much in the way of rules. Roads intersect, maybe with a stop sign, maybe not; it’s expected that you will look as you approach and proceed with caution (unless you’re the Dukes of Hazzard). If people start moving into the area and the traffic gets busier, then at least one of the intersecting roads will need a stop sign to avoid outright chaos. If things continue to grow to the point where cars can never get past the stop sign because the cross-traffic has no gaps, then a stoplight has to go in to regulate who goes when and give everyone a fair shot. As density increases further, a grid pattern typically emerges, at least over small concentrated areas, if not the whole city (unless you’re Boston). Left turns get harder to make, so lights go up for protected lefts. Now the intersections have complicated signaling rules, an entire cycle can take a while, and attempting to get traffic to flow smoothly – ideally with timed lights – becomes less and less tractable. At some point, things just get too complicated, and something’s gotta give, or else traffic will come to a standstill. So you abandon one direction of flow, going with one-way streets. By giving up one degree of freedom on a given street, the overall problem of managing traffic in the area becomes simpler. You may not be able to get to a given place by the most direct route, but you can still get to your destination, even if by a less direct route.

This is the approach Tela Innovations has proposed as a solution to the increasing complexities of trying to expose and pattern increasingly smaller geometries using wavelengths of light that are pretty much stuck at one place for the time being. The promise of Extended UV (EUV – sssssshhh… don’t call them X-Rays!!) is still pretty far off and won’t arrive in time for the 32-nm node and perhaps even nodes beyond that. The problems Tela proposes to address relate to both the complex interactions of exposure of arbitrary patterns and the challenge of moving to double-patterning.

As feature size dips significantly below the wavelengths of the exposing light, interference effects get increasingly bothersome. Optical Proximity Correction (OPC) is a big deal, and the rules for how to lay out different geometries near each other have gone nuts, in terms of both the required rules and the recommended rules (which generally become required rules on the next generation). At some point, traffic is threatening to come to a standstill.

Meanwhile, one of the standard approaches to reducing dimensions is through double-patterning. There are a variety of ways of doing this, but they all typically involve decomposing a given mask pattern into two sets of interleaving features. In fact, you can actually extend this to triple or more patterns. The simplest approach is to get, say, 50-nm pitch by dividing up the pattern evenly (more on that in a minute) and doing two 100-nm pitch exposures, one set of features interleaved between the other set. You could also divide the pattern into three and do three 150-nm pitch exposures. The key is to be able to separate all of the features on the mask into multiple independent sets, none of which are closer than, say, 100 nm (for the double-patterning example). This is a non-trivial task for an arbitrary set of geometries. It’s sometimes referred to as the “coloring problem” – just sit down with a pen and a napkin and start drawing lines that wind around each other at minimum dimensions, and then try to use two colors to separate them into lines that will appear on two different masks. You’ll find it’s pretty easy to come up with combinations that can’t be colored into two sets with double the pitch. Finding patterns that can be algorithmically decomposed by an EDA tool is even harder.

So here we have two problems caused by the arbitrary creation of patterns: too much optical complexity and the inability to decompose for double-patterning. This is the point at which Tela Innovations has suggested that we need to remove one direction of traffic. Now, as with any good (or bad) metaphor, we reach the point where it breaks down. What is being eliminated in Tela’s approach is an entire dimension: instead of 2-D patterns on a mask, only 1-D patterning is allowed, on a strictly gridded basis. This means that a given poly or metal mask, for example, will have either only north-south or east-west lines. Just as in the center of town, where two wrongs don’t make a right but three rights make a left, you can still get wherever you want; you just might have to jump a metal layer to move in the other dimension. Whether or not that proves problematic has yet to be seen; Tela has seen no practical limitations to date caused by the need to use another layer for moving at a right angle. This approach has been used on some NAND Flash cells already, but Tela is trying to move it into the logic mainstream.

The effect of this from an optical interaction standpoint is far greater regularity and predictability. That means few, if any, odd optical artifacts creating surprise instances of bridging and necking. With better variability control, more aggressive layout can be used, reducing cell area. In one set of experiments, it was found that variability decreased by 4-16X as compared to different 2-D patterns. Achieving no bridging or necking “hotspots” using 2-D patterns meant using recommended design rules that increased cell area by 10-15% over the area consumed by a required-design-rule-only approach; by contrast, using the 1-D approach achieved no hotspots, with an average of 5% area savings. Another benefit to reduced variability is reduced leakage current: variability tends to favor the narrower side of the distribution, meaning more leaky features. Controlling the variability reduces the number of leaky instances; one test case reduced leakage by 2.5X, while also reducing area by 15%.

With respect to double-patterning, that problem just got simple. Since any given layer consists of lines in only one direction, it’s a straightforward matter of picking every other line to decompose the mask into two exposures.

Tela’s business approach to this is mostly that of IP vendor and services provider and partly that of tool vendor. They have an authoring system that they use themselves as they work with their customers to define the cells of interest. They create the cell and lay it out, and then work with the customer to integrate it into their cell library. The customer also gets the authoring kit for modifying and taking ultimate ownership of the cell. It’s not yet clear when they would make the authoring kit available to customers to use from scratch. Their focus at present is on standard logic cells; from there they will concentrate on SRAM cells, I/O cells, and analog. It will be interesting to see if analog shapes can be made to conform to a grid-based approach or whether layers involving angles other than 90 degrees are required.

A remaining challenge is to get existing routers to use only the required dimension when putting all the cells together. Right now the approach is to apply a very high cost to wrong-way routes so that in effect the router will never choose them. Tela is working with EDA vendors to come up with more of a push-button approach to ensuring that the router uses only the designated dimension for all routes on a layer.

Tela has already done a 65-nm chip, and they now have a 45-nm chip being fabbed with a lead customer so that they can get more variability data. This test chip should be out sometime this month.

Leave a Reply

featured blogs
Mar 28, 2024
'Move fast and break things,' a motto coined by Mark Zuckerberg, captures the ethos of Silicon Valley where creative disruption remakes the world through the invention of new technologies. From social media to autonomous cars, to generative AI, the disruptions have reverberat...
Mar 26, 2024
Learn how GPU acceleration impacts digital chip design implementation, expanding beyond chip simulation to fulfill compute demands of the RTL-to-GDSII process.The post Can GPUs Accelerate Digital Design Implementation? appeared first on Chip Design....
Mar 21, 2024
The awesome thing about these machines is that you are limited only by your imagination, and I've got a GREAT imagination....

featured video

We are Altera. We are for the innovators.

Sponsored by Intel

Today we embark on an exciting journey as we transition to Altera, an Intel Company. In a world of endless opportunities and challenges, we are here to provide the flexibility needed by our ecosystem of customers and partners to pioneer and accelerate innovation. As we leap into the future, we are committed to providing easy-to-design and deploy leadership programmable solutions to innovators to unlock extraordinary possibilities for everyone on the planet.

To learn more about Altera visit: http://intel.com/altera

featured chalk talk

Improving Chip to Chip Communication with I3C
Sponsored by Mouser Electronics and Microchip
In this episode of Chalk Talk, Amelia Dalton and Toby Sinkinson from Microchip explore the benefits of I3C. They also examine how I3C helps simplify sensor networks, provides standardization for commonly performed functions, and how you can get started using Microchips I3C modules in your next design.
Feb 19, 2024
5,475 views