Prototyping MATLAB and Simulink Algorithms on Xilinx Zynq and Altera SoCs
The year 2011 saw a signature development in the FPGA industry – the introduction of two new programmable SoC devices. Xilinx introduced the Zynq-7000 All Programmable SoCs, and Altera introduced the Cyclone V SoC and Arria V SoC FPGAs. These new programmable SoCs, each packing a high-performance dual-core ARM Cortex-A9 MPcore along with ample amounts of programmable logic, offered advantages for a plethora of applications. Now designers could enjoy the benefits of software application development on one of the industry’s most popular processors while gaining the flexibility and throughput potential from hardware acceleration on a high-speed, programmable logic fabric.
Keeping Control Over Oscillation, Compensation
I should probably start with a confession. Clocks and oscillators have never been my strong suit. I get the concept of oscillation and I get the fundamental function of a crystal or other resonator, but there have been some aspects that have always bugged me – and yet I never had occasion to wrestle with them. Until now.
We’ll come back to the specifics of this in a moment, but I start with this comment simply to note (or perhaps warn) that I approach this topic with some level of naïveté. The benefit of that is that I may end up questioning things that don’t usually get questioned; the downside is that I may end up looking stupid. Of course, I risk the latter with every question I ask, so I’m somewhat inured to that possible outcome.
Undo Software’s Live Recorder Makes Production Bugs A Thing of the Past
Needle in the haystack got you down? Got them buggy software blues slowin' your stride? Never fear, Fish Fry is here with a podcastin' elixir to blow those blues (and bugs) away. In this week's episode, we tackle production software bugs with Undo Software CEO Greg Law. Greg is here to unveil the new bug-busting capabilities of Undo Software's production bug insecticide: Live Recorder. Also this week, we check out why the Palo Alto Starbucks may not be the best spot for a super-secret meeting about your new IOT prototype. Finally, we see how The MathWorks is taking the maker movement to a whole new level - with math.
The concept of designing, validating and then reusing functional blocks in integrated circuits (ICs) has been entrenched in the electronics industry for decades. Software development has a similar model utilizing libraries of common function calls or objects. However, the concept of reusing printed circuit board (PCB) modules is much less common. Reusing PCB modules for common or commodity functions offers considerable advantages, for example avoiding potential signal integrity or thermal problems, by utilizing circuit data whose performance has been proven in previous generations of products. The key to successful modular circuit design is a data management system that can store and control access to modular reusable blocks, manage information that is critical to design reuse, such as the layer structure of a routed block, and interface easily with the circuit design software. The end result is a reduction in time during schematic capture and PCB design, along with fewer design errors, making it possible to bring quality products to market faster.
Leveraging Physics for the Betterment of Humankind
“Reality is that which, if you stop believing in it, doesn’t go away.” – Philip K. Dick
We all work with the same laws of physics. That’s why they’re laws, not guidelines. We deal with Ohm’s Law, Shannon’s Law, Cole’s Law (thinly sliced cabbage), and others. And one of the immutable laws of electronics is that power consumption is proportional to voltage. Raise the voltage, and you raise the power consumption, all other things being equal. And of course, that works the other way, too. Lower voltages reduce power. Very tidy.
So why, oh why, do chipmakers have such a hard time reducing the power consumption of their microprocessors, microcontrollers, DRAMs, and other devices? Just lower the voltage! Did you not attend Electronics 101? How hard can that be?
The Mire of Modern System Verification
If a clock tree fails in a forest, and there are no vectors to catch it…
Verification has always been the black sheep of the engineering family, and for understandable reasons. Design teams are made up of intelligent, capable, and - dare we say occasionally arrogant - types who don’t take kindly to the notion that their work contains errors. Yet, we have verification teams who make their entire career finding the bugs in the work of designers.
Does this sound like a recipe for peace and harmony?
As system complexity has exploded, design productivity has largely kept pace. There is, of course, the ubiquitous EDA marketing slide - a graph over time showing an expanding “gap” between the number of gates we can design and the number of gates Moore’s Law will allow us to put on a chip.