Imec recently issued a press release that, early on, mentioned a “junctionless transistor.” Now… as far as I can remember back, transistors always had junctions. So I completely locked up on the question of what a junctionless transistor even means.
I got a chance to ask them when visiting their site last week. Not only is it simple, but it’s beside the point of the release. What they’re calling a junctionless transistor might simply have been called a JFET back when I was in school. Just made differently. They laid down a layer of GeSn – a very thin one over “semi-insulating silicon” (not to be confused with semiconducting silicon, of course). They then laid a fin across it. This created a depletion-mode, or normally-on, FET, with the fin controlling whether the channel conducted or not.
Pretty straightforward, conceptually. But the point of the whole thing is how they created that GeSn channel. Incorporating tin in germanium is apparently not so easy. Solubility is low, and if temperatures get too high during the process, the tin can migrate around and agglomerate in chunks instead of remaining dispersed uniformly throughout.
They came up with a relatively low-temp solid-phase epitaxy process that achieved this. Solid-phase epitaxy is a process that involves laying down an amorphous version of the desired material, followed by an anneal that crystallizes the layer.
What’s useful about this is that mobility is increased by the tin, but the tin also affects the bandgap, adding more direct bandgap characteristic, which helps with LEDs and other photonic applications. The idea is that such devices could be built on the same chip as regular silicon transistors, or heck, you could probably build them all out of this, relying on the lasing capabilities where needed. This would provide better integration of the transition between photonic and computing domains.
You can find out more in their release.