editor's blog
Subscribe Now

More Than Power Structures

With the multi-domain power beasts being designed into today’s SoCs, it’s easy to miss a detail. Which is why verification is so much more important than it used to be, when inspection and a spreadsheet or two might have gotten you through.

So today you can get verification tools to help you to ensure that the voltages are right and that level shifters and isolation are all in place. But, in a recent announcement, Jasper claims to take things one step further: In addition to verifying the static structure of the power edifice, they can also verify the power sequencing.

They take in the design RTL and the power intent (either UPF for CPF) and, from that, create a model that can be verified using their formal technology. They say that they can check the power optimization structures, power management, and the sequencing. In conjunction with their other tools, they can also check to make sure that the power optimization circuits won’t screw something else in the design up.

You can read more in their release.

Leave a Reply

featured blogs
May 25, 2018
As I mentioned in my last post , I attended one day of the Embedded Vision Summit this week, and as I did last year , I had a great time learning about vision applications in the AI landscape. Last year, I attended more of the '€œFundamentals'€ and '€œBusiness Insights...
May 25, 2018
A key component of any high-speed signal path is the interconnect.  Design engineers must identify the right connector (or connectors) and the best performance for the application. At 56 Gbps PAM4 data rates (and higher), connector selection becomes more challenging. Interco...
May 24, 2018
Amazon has apparently had an Echo hiccup of the sort that would give customers bad dreams. It sent a random conversation to a random contact. A couple had installed numerous Alexa-enabled devices in the home. At some point, they had a conversation '€“ as couples are wont to...