editor's blog
Subscribe Now

Continued FinFET Roll

The Synopsys Users’ Group scheduled a panel session on FinFETs at their recent session. This is consistent with pretty much every EDA company providing FinFET content for their users; they’re the latest hot topic, and represent a non-trivial change.

But the popularity of the topic was driven home rather starkly. They used the auditorium at the Santa Clara Convention Center, and even so, it was standing-room only, and many, many people had to be turned away when there wasn’t more room for standing. So interest was obviously quite keen. Which reflect the fact that FinFETs are in transition: once the far-out concept for some future technology node, this stuff is becoming real for lots of real engineers.

And, for the most part, the panel said the usual things you might expect about why FinFETs are necessary or good and what’s different about using them. The Synopsys speaker talked about the tools, of course, but it was still too early to see the results of the lead lots they had put through.

And it was refreshing to have Cavium on the panel as a user, with the candor to discuss what they felt was the biggest drawback about FinFETs: parasitic capacitances. As in, there are too many of them. So they were having trouble keeping dynamic power down. They requested EDA help both in optimizing dynamic power consumption and with EM analysis.

Not that they thought that FinFETs were a bad idea in general; they agreed with the litany of benefits that is typically trotted out. But their willingness to say, “They’re good but…” helped give a real-world feel to the kind of panel that can too often be simply an echo chamber for laudatory talking points.

Leave a Reply

featured blogs
Mar 28, 2024
'Move fast and break things,' a motto coined by Mark Zuckerberg, captures the ethos of Silicon Valley where creative disruption remakes the world through the invention of new technologies. From social media to autonomous cars, to generative AI, the disruptions have reverberat...
Mar 26, 2024
Learn how GPU acceleration impacts digital chip design implementation, expanding beyond chip simulation to fulfill compute demands of the RTL-to-GDSII process.The post Can GPUs Accelerate Digital Design Implementation? appeared first on Chip Design....
Mar 21, 2024
The awesome thing about these machines is that you are limited only by your imagination, and I've got a GREAT imagination....

featured video

We are Altera. We are for the innovators.

Sponsored by Intel

Today we embark on an exciting journey as we transition to Altera, an Intel Company. In a world of endless opportunities and challenges, we are here to provide the flexibility needed by our ecosystem of customers and partners to pioneer and accelerate innovation. As we leap into the future, we are committed to providing easy-to-design and deploy leadership programmable solutions to innovators to unlock extraordinary possibilities for everyone on the planet.

To learn more about Altera visit: http://intel.com/altera

featured chalk talk

High-Voltage Isolation for Robust and Reliable System Operation
In this episode of Chalk Talk, Amelia Dalton and Luke Trowbridge from Texas Instruments examine the benefits of isolation in high voltage systems. They also explore the benefits of TI’s integrated transformer technology and how TI’s high voltage isolations can help you streamline your design process, reduce your bill of materials, and ensure reliable and robust system operation.
Apr 27, 2023
36,442 views