editor's blog
Subscribe Now

Optical Enhancements

Earlier this year we looked at Synopsys’s optical modeling tools, including their CODE V toolset.  They recently announced an update with a number of enhancements for a variety of scenarios. It’s illustrative of the range of applications that such a tool finds itself addressing.

  • First, they’ve enabled complex fields to be input to the tool. This means that light sources such as photonic elements and multi-mode lasers can be analyzed using the output of waveguide modeling tools.
  • While their “beam synthesis propagation” (BSP) tool (an element within CODE V) has been able to handle polarization before, it couldn’t deal with so-called “birefringent uniaxial crystals,” which have different indices of refraction for different polarizations, and therefore split a beam into two, depending on the angle of incidence. Of familiar materials, apparently SiC is highly birefringent.
  • They’ve also released pre-analysis improvements to allow the BSP tool to work with a broader range of scenarios, including free-space telecommunications devices with input from optical fiber.
  • Like so many other EDA tools, they’ve joined the multicore world to cut down analysis time.
  • And they have a Glass Expert tool that recommends glass for lenses based on the goals of the system; it’s now been integrated into CODE V.

More info is available in their release

Leave a Reply

featured blogs
Aug 18, 2018
Once upon a time, the Santa Clara Valley was called the Valley of Heart'€™s Delight; the main industry was growing prunes; and there were orchards filled with apricot and cherry trees all over the place. Then in 1955, a future Nobel Prize winner named William Shockley moved...
Aug 17, 2018
Samtec’s growing portfolio of high-performance Silicon-to-Silicon'„¢ Applications Solutions answer the design challenges of routing 56 Gbps signals through a system. However, finding the ideal solution in a single-click probably is an obstacle. Samtec last updated the...
Aug 17, 2018
If you read my post Who Put the Silicon in Silicon Valley? then you know my conclusion: Let's go with Shockley. He invented the transistor, came here, hired a bunch of young PhDs, and sent them out (by accident, not design) to create the companies, that created the compa...
Aug 16, 2018
All of the little details were squared up when the check-plots came out for "final" review. Those same preliminary files were shared with the fab and assembly units and, of course, the vendors have c...
Jul 30, 2018
As discussed in part 1 of this blog post, each instance of an Achronix Speedcore eFPGA in your ASIC or SoC design must be configured after the system powers up because Speedcore eFPGAs employ nonvolatile SRAM technology to store its configuration bits. The time required to pr...