editor's blog
Subscribe Now

A Step Up

One of the challenges of TSVs is that they’re deeper than other vias and features. Drilling those babies uses deep reactive ion etching (DRIE), which we discussed in our MEMS article earlier in the year. The Bosch process, in particular, consists of a series of etch and clean steps that can leave scalloped sidewalls and other rough features that can be hard to cover properly when filling with metal.

French company Alchimer, which focuses on chemical deposition of “nanometric films” for a variety of leading technologies, has announced a new barrier layer that they say guarantees 100% step coverage. The material is NiB, in contrast to the more traditional TaN and TiN, which, they claim, tend to be used mostly because of their compatibility with standard chemical and plasma vapor deposition (CVD and PVD) processes.

They claim that the NiB has barrier properties similar to TiN and copper, while having diffusion characteristics similar to Ta and TaN. But it also allows the subsequent copper to be filled without requiring a seed layer. The sum total of these benefits is said to save a number of cleaning and other miscellaneous process steps that are currently required, reducing cost.

They call their general process “electrografting”: they deposit a thin layer onto a non-conductive substrate using a water-based process that has molecules from liquid organic precursors of the film layer bonding to the electrons in the substrate. These precursors act as seeds for the rest of the layer.

More info in their release

Leave a Reply

featured blogs
Jul 20, 2018
https://youtu.be/KwrfcMtbMDM Coming from CDNLive Japan (camera Asushi Tanaka) Monday: Nicolas's Recipe for Digital Marketing in EDA Tuesday: Embargoed announcement Wednesday: Trends, Technologies, and Regulation in China's Auto Market Thursday: Breakfast Bytes Guide...
Jul 19, 2018
In the footer of Samtec.com, we'€™ve always made it easy to contact us by phone, email, or live chat (even fax back in the day!). To continue to progress this theme, you'€™ll now find a new helpful tool in the footer area of Samtec.com. This tool will match you up with yo...
Jul 16, 2018
Each instance of an Achronix Speedcore eFPGA in your ASIC or SoC design must be configured after the system powers up because Speedcore eFPGAs employ nonvolatile SRAM technology to store the eFPGA'€™s configuration bits. Each Speedcore instance contains its own FPGA configu...
Jul 12, 2018
A single failure of a machine due to heat can bring down an entire assembly line to halt. At the printed circuit board level, we designers need to provide the most robust solutions to keep the wheels...