editor's blog
Subscribe Now

Veridae Drops the Third Shoe

Back in May, we talked about Veridae taking their erstwhile all-things-for-all-designers debug product Clarus and cut its coverage to SoCs only, introducing a new Corus product for FPGAs. And for single FPGAs, to be specific. This left uncovered the other area that the original Clarus was going to cover: multiple FPGAs.

That final piece is now in place, as Certus. So, to summarize, we have:

  • Clarus for SoCs
  • Corus for single FPGAs
  • Certus for multiple FPGAs

They also announced that they’ve worked with the Dini group to provide a development and debug platform supporting up to 20 FPGAs or 130 million ASIC gates; and they’ve been worked into Mentor’s FPGA design flow.

Their releases have more information on Certus, the Dini arrangement, and the Mentor flow

Leave a Reply

featured blogs
May 25, 2018
You are probably subscribed to a number of email newsletters. No doubt you have been receiving emails saying that the system is changing the way that they are handling their mailing lists and that if you want to continue to receive the emails, then you need to re-subscribe. I...
May 24, 2018
Amazon has apparently had an Echo hiccup of the sort that would give customers bad dreams. It sent a random conversation to a random contact. A couple had installed numerous Alexa-enabled devices in the home. At some point, they had a conversation '€“ as couples are wont to...
May 23, 2018
It’s been over a year since we last updated the Samtec homepage. As you may have already noticed, we recently took some time to refresh it. You can see a comparison below of the old homepage (top), vs the new homepage (bottom). The new update puts more attention on our ...