editor's blog
Subscribe to EE Journal Daily Newsletter

Go Wide

Last week Cadence announced a new wide-I/O memory controller IP block, ostensibly the first of its kind. This actually represents a risk start based on a JEDEC standard that’s not yet complete.

The idea behind the wide-I/O movement is predicated on use in 3D ICs, where a memory chip will be stacked on a logic chip, with the connections being made by TSVs. Instead of requiring higher-drive I/Os that connect to chip pads and traverse PCB traces to get to a memory chip (or back from the memory chip), you stay entirely within the package. An array of TSVs mean that you can handle far more I/Os that if you have to go to package pins. And the drive requirements are reduced tremendously, reducing both the size (due to smaller transistors) and power of the resulting combination.

Of course, with more connections, you get much higher bandwidth: this is a 512-bit interface. That’s a lot more data available in one chunk than you can traditionally get.

Cadence’s controller block includes traffic shaping algorithms to increase throughput as well as features to address power, including traffic sensing (so that power can respond to traffic) and an option for dynamic voltage and frequency scaling (DVFS).

This would seem to come well ahead of the standard, which is projected (no promises!) to be available to non-members in September. But, in many such standardization cases, the technical details are approved first, and then the resulting standard goes through a higher-level board approval step that largely examines the process by which the standard was set to make sure that it was done properly. 

Clearly Cadence is betting that there will be no further technical changes. Or that, if there are, they can update the IP before any customer commits to final silicon.

Leave a Reply

featured blogs
Oct 18, 2017
Rob Aitken is digging a bit deeper into what it would really take to connect a trillion things in his keynote next Thursday at Arm TechCon How to Build and Connect a Trillion Things . What would those things be? What might unit volumes be? How could we power them? Secure them...
Oct 18, 2017
As consumers, no one ever complains that their wireless connectivity is “too fast”. Global wireless carriers and network providers continue to push the limits of 4G LTE, but a next-generation wireless standard – 5G New Radio (5G NR) – is on the horizo...
Sep 12, 2017
Torrents of packets will cascade into the data center: endless streams of data from the Internet of Things (IoT), massive flows of cellular network traffic into virtualized network functions, bursts of input to Web applications. And hidden in the cascades, far darker bits try...
Sep 29, 2017
Our existing customers ask us some pretty big questions: “How can this technology implement a step-change in my specific process? How can Speedcore IP be integrated in my SoC? How can you increase the performance of my ASIC?” We revel in answering such questions. Ho...