editor's blog
Subscribe Now

28-nm NVM Lives

A couple years ago we looked at the possibility that non-volatile memory (NVM) might have a limited future. Given that the main physical mechanism of concern at the time was floating gate leakage through excessive tunneling, it certainly seems to give an edge to the one-time programmable (OTP) guys when it comes to migration to advanced nodes. They use anti-fuses instead of floating gates, and so aren’t limited by tunneling through ultra-thin oxide.

Last week Kilopass announced that they had a successful test chip using TSMC’s 28-nm process with high-κ metal gates. The process wasn’t altered in any way to implement the NVM cells. They also claim to have demonstrated scalability to 22 nm, and Kilpass’s Linh Hong says they’re in “very very early development” of 20-nm cells.

This is the world’s first 28-nm NVM cell, so, coupled with the projections going forward, it would look like there’s no premature end to this particular technology.

The release has more details…

Leave a Reply

featured blogs
Aug 15, 2018
https://youtu.be/6a0znbVfFJk \ Coming from the Cadence parking lot (camera Sean) Monday: Jobs: Farmer, Baker Tuesday: Jobs: Printer, Chocolate Maker Wednesday: Jobs: Programmer, Caver Thursday: Jobs: Some Lessons Learned Friday: Jobs: Five Lessons www.breakfastbytes.com Sign ...
Aug 15, 2018
VITA 57.4 FMC+ Standard As an ANSI/VITA member, Samtec supports the release of the new ANSI/VITA 57.4-2018 FPGA Mezzanine Card Plus Standard. VITA 57.4, also referred to as FMC+, expands upon the I/O capabilities defined in ANSI/VITA 57.1 FMC by adding two new connectors that...
Aug 15, 2018
The world recognizes the American healthcare system for its innovation in precision medicine, surgical techniques, medical devices, and drug development. But they'€™ve been slow to adopt 21st century t...
Aug 14, 2018
I worked at HP in Ft. Collins, Colorado back in the 1970s. It was a heady experience. We were designing and building early, pre-PC desktop computers and we owned the market back then. The division I worked for eventually migrated to 32-bit workstations, chased from the deskto...
Jul 30, 2018
As discussed in part 1 of this blog post, each instance of an Achronix Speedcore eFPGA in your ASIC or SoC design must be configured after the system powers up because Speedcore eFPGAs employ nonvolatile SRAM technology to store its configuration bits. The time required to pr...